forked from OSchip/llvm-project
[X86] Recognize constant splats in LowerFCOPYSIGN.
llvm-svn: 345484
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@ -18060,7 +18060,7 @@ static SDValue LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) {
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// TODO: If we had general constant folding for FP logic ops, this check
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// wouldn't be necessary.
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SDValue MagBits;
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if (ConstantFPSDNode *Op0CN = dyn_cast<ConstantFPSDNode>(Mag)) {
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if (ConstantFPSDNode *Op0CN = isConstOrConstSplatFP(Mag)) {
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APFloat APF = Op0CN->getValueAPF();
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APF.clearSign();
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MagBits = DAG.getConstantFP(APF, dl, LogicVT);
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@ -71,18 +71,16 @@ define <4 x float> @v4f32_neg(<4 x float> %a, <4 x float> %b) nounwind {
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define <4 x float> @v4f32_const_mag(<4 x float> %a, <4 x float> %b) nounwind {
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; X86-LABEL: v4f32_const_mag:
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; X86: # %bb.0:
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; X86-NEXT: andps {{\.LCPI.*}}, %xmm1
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; X86-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1]
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; X86-NEXT: movaps %xmm1, %xmm0
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; X86-NEXT: andps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: orps %xmm1, %xmm0
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; X86-NEXT: orps {{\.LCPI.*}}, %xmm0
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; X86-NEXT: retl
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;
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; X64-LABEL: v4f32_const_mag:
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; X64: # %bb.0:
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; X64-NEXT: andps {{.*}}(%rip), %xmm1
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; X64-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1]
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; X64-NEXT: movaps %xmm1, %xmm0
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; X64-NEXT: andps {{.*}}(%rip), %xmm0
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; X64-NEXT: orps %xmm1, %xmm0
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; X64-NEXT: orps {{.*}}(%rip), %xmm0
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; X64-NEXT: retq
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%tmp = tail call <4 x float> @llvm.copysign.v4f32(<4 x float> <float 1.0, float 1.0, float 1.0, float 1.0>, <4 x float> %b )
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ret <4 x float> %tmp
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