forked from OSchip/llvm-project
add support for referencing registers and immediates,
building the tree to represent them but not emitting table entries for them yet. llvm-svn: 96617
This commit is contained in:
parent
1feba3c980
commit
42a7ba7a67
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@ -203,7 +203,7 @@ GetInt8(const unsigned char *MatcherTable, unsigned &Idx) {
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enum BuiltinOpcodes {
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OPC_Emit,
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OPC_Push,
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OPC_Record,
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OPC_RecordNode,
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OPC_MoveChild,
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OPC_MoveParent,
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OPC_CheckSame,
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@ -294,7 +294,7 @@ SDNode *SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
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MatchScopes.push_back(NewEntry);
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continue;
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}
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case OPC_Record:
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case OPC_RecordNode:
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// Remember this node, it may end up being an operand in the pattern.
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RecordedNodes.push_back(N);
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continue;
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@ -10,6 +10,7 @@
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#include "DAGISelMatcher.h"
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#include "CodeGenDAGPatterns.h"
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#include "CodeGenTarget.h"
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#include "Record.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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@ -117,3 +118,19 @@ void CheckChainCompatibleMatcherNode::print(raw_ostream &OS,
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OS.indent(indent) << "CheckChainCompatibleMatcherNode " << PreviousOp << "\n";
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printNext(OS, indent);
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}
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void EmitIntegerMatcherNode::print(raw_ostream &OS, unsigned indent) const {
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OS.indent(indent) << "EmitIntegerMatcherNode " << Val << " VT=" << VT << '\n';
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printNext(OS, indent);
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}
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void EmitRegisterMatcherNode::print(raw_ostream &OS, unsigned indent) const {
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OS.indent(indent) << "EmitRegisterMatcherNode ";
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if (Reg)
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OS << Reg->getName();
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else
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OS << "zero_reg";
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OS << " VT=" << VT << '\n';
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printNext(OS, indent);
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}
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@ -21,6 +21,7 @@ namespace llvm {
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class PatternToMatch;
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class raw_ostream;
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class ComplexPattern;
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class Record;
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MatcherNode *ConvertPatternToMatcher(const PatternToMatch &Pattern,
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const CodeGenDAGPatterns &CGP);
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@ -36,25 +37,31 @@ class MatcherNode {
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OwningPtr<MatcherNode> Next;
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public:
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enum KindTy {
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EmitNode,
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Push, // [Push, Dest0, Dest1, Dest2, Dest3]
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Record, // [Record]
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MoveChild, // [MoveChild, Child#]
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MoveParent, // [MoveParent]
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// Stack manipulation.
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Push, // Push a checking scope.
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RecordNode, // Record the current node.
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MoveChild, // Move current node to specified child.
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MoveParent, // Move current node to parent.
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CheckSame, // [CheckSame, N] Fail if not same as prev match.
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// Predicate checking.
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CheckSame, // Fail if not same as prev match.
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CheckPatternPredicate,
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CheckPredicate, // [CheckPredicate, P] Fail if predicate fails.
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CheckOpcode, // [CheckOpcode, Opcode] Fail if not opcode.
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CheckType, // [CheckType, MVT] Fail if not correct type.
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CheckInteger, // [CheckInteger, int0,int1,int2,...int7] Fail if wrong val.
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CheckCondCode, // [CheckCondCode, CondCode] Fail if not condcode.
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CheckPredicate, // Fail if node predicate fails.
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CheckOpcode, // Fail if not opcode.
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CheckType, // Fail if not correct type.
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CheckInteger, // Fail if wrong val.
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CheckCondCode, // Fail if not condcode.
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CheckValueType,
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CheckComplexPat,
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CheckAndImm,
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CheckOrImm,
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CheckFoldableChainNode,
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CheckChainCompatible
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CheckChainCompatible,
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// Node creation/emisssion.
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EmitInteger, // Create a TargetConstant
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EmitRegister, // Create a register.
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EmitNode
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};
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const KindTy Kind;
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@ -77,23 +84,6 @@ protected:
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void printNext(raw_ostream &OS, unsigned indent) const;
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};
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/// EmitNodeMatcherNode - This signals a successful match and generates a node.
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class EmitNodeMatcherNode : public MatcherNode {
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const PatternToMatch &Pattern;
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public:
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EmitNodeMatcherNode(const PatternToMatch &pattern)
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: MatcherNode(EmitNode), Pattern(pattern) {}
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const PatternToMatch &getPattern() const { return Pattern; }
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static inline bool classof(const MatcherNode *N) {
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return N->getKind() == EmitNode;
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}
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virtual void print(raw_ostream &OS, unsigned indent = 0) const;
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};
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/// PushMatcherNode - This pushes a failure scope on the stack and evaluates
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/// 'Next'. If 'Next' fails to match, it pops its scope and attempts to
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/// match 'Failure'.
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@ -123,12 +113,12 @@ class RecordMatcherNode : public MatcherNode {
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std::string WhatFor;
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public:
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RecordMatcherNode(const std::string &whatfor)
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: MatcherNode(Record), WhatFor(whatfor) {}
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: MatcherNode(RecordNode), WhatFor(whatfor) {}
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const std::string &getWhatFor() const { return WhatFor; }
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static inline bool classof(const MatcherNode *N) {
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return N->getKind() == Record;
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return N->getKind() == RecordNode;
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}
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virtual void print(raw_ostream &OS, unsigned indent = 0) const;
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@ -388,8 +378,60 @@ public:
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virtual void print(raw_ostream &OS, unsigned indent = 0) const;
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};
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/// EmitIntegerMatcherNode - This creates a new TargetConstant.
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class EmitIntegerMatcherNode : public MatcherNode {
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int64_t Val;
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MVT::SimpleValueType VT;
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public:
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EmitIntegerMatcherNode(int64_t val, MVT::SimpleValueType vt)
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: MatcherNode(EmitInteger), Val(val), VT(vt) {}
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int64_t getVal() const { return Val; }
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MVT::SimpleValueType getVT() const { return VT; }
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static inline bool classof(const MatcherNode *N) {
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return N->getKind() == EmitInteger;
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}
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virtual void print(raw_ostream &OS, unsigned indent = 0) const;
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};
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/// EmitRegisterMatcherNode - This creates a new TargetConstant.
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class EmitRegisterMatcherNode : public MatcherNode {
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/// Reg - The def for the register that we're emitting. If this is null, then
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/// this is a reference to zero_reg.
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Record *Reg;
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MVT::SimpleValueType VT;
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public:
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EmitRegisterMatcherNode(Record *reg, MVT::SimpleValueType vt)
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: MatcherNode(EmitRegister), Reg(reg), VT(vt) {}
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Record *getReg() const { return Reg; }
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MVT::SimpleValueType getVT() const { return VT; }
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static inline bool classof(const MatcherNode *N) {
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return N->getKind() == EmitRegister;
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}
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virtual void print(raw_ostream &OS, unsigned indent = 0) const;
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};
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/// EmitNodeMatcherNode - This signals a successful match and generates a node.
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class EmitNodeMatcherNode : public MatcherNode {
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const PatternToMatch &Pattern;
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public:
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EmitNodeMatcherNode(const PatternToMatch &pattern)
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: MatcherNode(EmitNode), Pattern(pattern) {}
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const PatternToMatch &getPattern() const { return Pattern; }
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static inline bool classof(const MatcherNode *N) {
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return N->getKind() == EmitNode;
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}
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virtual void print(raw_ostream &OS, unsigned indent = 0) const;
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};
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} // end namespace llvm
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#endif
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@ -125,8 +125,8 @@ EmitMatcher(const MatcherNode *N, unsigned Indent) {
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<< *cast<EmitNodeMatcherNode>(N)->getPattern().getDstPattern() << "\n";
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OS.PadToColumn(Indent*2) << "OPC_Emit, /*XXX*/\n\n";
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return 1;
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case MatcherNode::Record:
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OS << "OPC_Record,";
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case MatcherNode::RecordNode:
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OS << "OPC_RecordNode,";
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OS.PadToColumn(CommentIndent) << "// "
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<< cast<RecordMatcherNode>(N)->getWhatFor() << '\n';
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return 1;
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@ -212,6 +212,11 @@ EmitMatcher(const MatcherNode *N, unsigned Indent) {
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OS << "OPC_CheckChainCompatible, "
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<< cast<CheckChainCompatibleMatcherNode>(N)->getPreviousOp() << ",\n";
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return 2;
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case MatcherNode::EmitInteger:
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case MatcherNode::EmitRegister:
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// FIXME: Implement.
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return 0;
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}
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assert(0 && "Unreachable");
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return 0;
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@ -397,6 +397,38 @@ void MatcherGen::EmitMatcherCode() {
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void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
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SmallVectorImpl<unsigned> &ResultOps) {
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assert(N->isLeaf() && "Must be a leaf");
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if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
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AddMatcherNode(new EmitIntegerMatcherNode(II->getValue(),N->getTypeNum(0)));
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//ResultOps.push_back(TmpNode(TmpNo++));
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return;
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}
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// If this is an explicit register reference, handle it.
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if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
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if (DI->getDef()->isSubClassOf("Register")) {
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AddMatcherNode(new EmitRegisterMatcherNode(DI->getDef(),
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N->getTypeNum(0)));
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//ResultOps.push_back(TmpNode(TmpNo++));
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return;
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}
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if (DI->getDef()->getName() == "zero_reg") {
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AddMatcherNode(new EmitRegisterMatcherNode(0, N->getTypeNum(0)));
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//ResultOps.push_back(TmpNode(TmpNo++));
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return;
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}
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#if 0
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if (DI->getDef()->isSubClassOf("RegisterClass")) {
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// Handle a reference to a register class. This is used
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// in COPY_TO_SUBREG instructions.
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// FIXME: Implement.
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}
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#endif
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}
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errs() << "unhandled leaf node: \n";
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N->dump();
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}
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