forked from OSchip/llvm-project
[SDAG] reduce code duplication and fix formatting; NFC
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1e1b60138c
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429f10f5f2
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@ -19206,28 +19206,27 @@ SDValue DAGCombiner::scalarizeExtractedVectorLoad(SDNode *EVE, EVT InVecVT,
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if (ResultVT.bitsGT(VecEltVT)) {
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// If the result type of vextract is wider than the load, then issue an
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// extending load instead.
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ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT,
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VecEltVT)
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? ISD::ZEXTLOAD
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: ISD::EXTLOAD;
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Load = DAG.getExtLoad(ExtType, SDLoc(EVE), ResultVT,
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OriginalLoad->getChain(), NewPtr, MPI, VecEltVT,
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Alignment, OriginalLoad->getMemOperand()->getFlags(),
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ISD::LoadExtType ExtType =
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TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, VecEltVT) ? ISD::ZEXTLOAD
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: ISD::EXTLOAD;
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Load = DAG.getExtLoad(ExtType, DL, ResultVT, OriginalLoad->getChain(),
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NewPtr, MPI, VecEltVT, Alignment,
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OriginalLoad->getMemOperand()->getFlags(),
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OriginalLoad->getAAInfo());
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Chain = Load.getValue(1);
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} else {
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Load = DAG.getLoad(
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VecEltVT, SDLoc(EVE), OriginalLoad->getChain(), NewPtr, MPI, Alignment,
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OriginalLoad->getMemOperand()->getFlags(), OriginalLoad->getAAInfo());
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Load = DAG.getLoad(VecEltVT, DL, OriginalLoad->getChain(), NewPtr, MPI,
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Alignment, OriginalLoad->getMemOperand()->getFlags(),
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OriginalLoad->getAAInfo());
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Chain = Load.getValue(1);
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if (ResultVT.bitsLT(VecEltVT))
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Load = DAG.getNode(ISD::TRUNCATE, SDLoc(EVE), ResultVT, Load);
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Load = DAG.getNode(ISD::TRUNCATE, DL, ResultVT, Load);
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else
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Load = DAG.getBitcast(ResultVT, Load);
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}
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WorklistRemover DeadNodes(*this);
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SDValue From[] = { SDValue(EVE, 0), SDValue(OriginalLoad, 1) };
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SDValue To[] = { Load, Chain };
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SDValue From[] = {SDValue(EVE, 0), SDValue(OriginalLoad, 1)};
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SDValue To[] = {Load, Chain};
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DAG.ReplaceAllUsesOfValuesWith(From, To, 2);
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// Make sure to revisit this node to clean it up; it will usually be dead.
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AddToWorklist(EVE);
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