forked from OSchip/llvm-project
parent
112f5696fb
commit
4298df6d86
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@ -529,7 +529,8 @@ SDValue DAGCombiner::ReassociateOps(unsigned Opc, DebugLoc DL,
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cast<ConstantSDNode>(N0.getOperand(1)),
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cast<ConstantSDNode>(N1));
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return DAG.getNode(Opc, DL, VT, N0.getOperand(0), OpNode);
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} else if (N0.hasOneUse()) {
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}
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if (N0.hasOneUse()) {
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// reassoc. (op (op x, c1), y) -> (op (op x, y), c1) iff x+c1 has one use
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SDValue OpNode = DAG.getNode(Opc, N0.getDebugLoc(), VT,
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N0.getOperand(0), N1);
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@ -546,7 +547,8 @@ SDValue DAGCombiner::ReassociateOps(unsigned Opc, DebugLoc DL,
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cast<ConstantSDNode>(N1.getOperand(1)),
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cast<ConstantSDNode>(N0));
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return DAG.getNode(Opc, DL, VT, N1.getOperand(0), OpNode);
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} else if (N1.hasOneUse()) {
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}
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if (N1.hasOneUse()) {
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// reassoc. (op y, (op x, c1)) -> (op (op x, y), c1) iff x+c1 has one use
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SDValue OpNode = DAG.getNode(Opc, N0.getDebugLoc(), VT,
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N1.getOperand(0), N0);
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@ -1566,7 +1568,8 @@ static SDValue tryFoldToZero(DebugLoc DL, const TargetLowering &TLI, EVT VT,
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SelectionDAG &DAG, bool LegalOperations) {
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if (!VT.isVector()) {
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return DAG.getConstant(0, VT);
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} else if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) {
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}
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if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) {
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// Produce a vector of zeros.
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SDValue El = DAG.getConstant(0, VT.getVectorElementType());
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std::vector<SDValue> Ops(VT.getVectorNumElements(), El);
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@ -4014,7 +4017,7 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
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EVT EltVT = VT.getVectorElementType();
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SmallVector<SDValue,8> OneOps(VT.getVectorNumElements(),
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DAG.getConstant(1, EltVT));
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if (VT.getSizeInBits() == N0VT.getSizeInBits()) {
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if (VT.getSizeInBits() == N0VT.getSizeInBits())
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// We know that the # elements of the results is the same as the
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// # elements of the compare (and the # elements of the compare result
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// for that matter). Check to see that they are the same size. If so,
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@ -4026,25 +4029,24 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
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cast<CondCodeSDNode>(N0.getOperand(2))->get()),
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DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), VT,
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&OneOps[0], OneOps.size()));
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} else {
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// If the desired elements are smaller or larger than the source
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// elements we can use a matching integer vector type and then
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// truncate/sign extend
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EVT MatchingElementType =
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EVT::getIntegerVT(*DAG.getContext(),
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N0VT.getScalarType().getSizeInBits());
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EVT MatchingVectorType =
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EVT::getVectorVT(*DAG.getContext(), MatchingElementType,
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N0VT.getVectorNumElements());
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SDValue VsetCC =
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DAG.getVSetCC(N->getDebugLoc(), MatchingVectorType, N0.getOperand(0),
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N0.getOperand(1),
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cast<CondCodeSDNode>(N0.getOperand(2))->get());
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return DAG.getNode(ISD::AND, N->getDebugLoc(), VT,
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DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT),
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DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), VT,
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&OneOps[0], OneOps.size()));
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}
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// If the desired elements are smaller or larger than the source
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// elements we can use a matching integer vector type and then
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// truncate/sign extend
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EVT MatchingElementType =
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EVT::getIntegerVT(*DAG.getContext(),
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N0VT.getScalarType().getSizeInBits());
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EVT MatchingVectorType =
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EVT::getVectorVT(*DAG.getContext(), MatchingElementType,
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N0VT.getVectorNumElements());
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SDValue VsetCC =
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DAG.getVSetCC(N->getDebugLoc(), MatchingVectorType, N0.getOperand(0),
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N0.getOperand(1),
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cast<CondCodeSDNode>(N0.getOperand(2))->get());
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return DAG.getNode(ISD::AND, N->getDebugLoc(), VT,
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DAG.getSExtOrTrunc(VsetCC, N->getDebugLoc(), VT),
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DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), VT,
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&OneOps[0], OneOps.size()));
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}
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// zext(setcc x,y,cc) -> select_cc x, y, 1, 0, cc
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@ -7505,18 +7507,17 @@ bool DAGCombiner::FindAliasInfo(SDNode *N,
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SrcValueAlign = LD->getOriginalAlignment();
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TBAAInfo = LD->getTBAAInfo();
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return true;
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} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
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}
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if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
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Ptr = ST->getBasePtr();
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Size = ST->getMemoryVT().getSizeInBits() >> 3;
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SrcValue = ST->getSrcValue();
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SrcValueOffset = ST->getSrcValueOffset();
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SrcValueAlign = ST->getOriginalAlignment();
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TBAAInfo = ST->getTBAAInfo();
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} else {
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llvm_unreachable("FindAliasInfo expected a memory operand");
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return false;
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}
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return false;
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llvm_unreachable("FindAliasInfo expected a memory operand");
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}
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/// GatherAllAliases - Walk up chain skipping non-aliasing memory nodes,
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@ -7629,13 +7630,13 @@ SDValue DAGCombiner::FindBetterChain(SDNode *N, SDValue OldChain) {
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// Accumulate all the aliases to this node.
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GatherAllAliases(N, OldChain, Aliases);
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if (Aliases.size() == 0) {
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// If no operands then chain to entry token.
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// If no operands then chain to entry token.
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if (Aliases.size() == 0)
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return DAG.getEntryNode();
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} else if (Aliases.size() == 1) {
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// If a single operand then chain to it. We don't need to revisit it.
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// If a single operand then chain to it. We don't need to revisit it.
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if (Aliases.size() == 1)
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return Aliases[0];
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}
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// Construct a custom tailored token factor.
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return DAG.getNode(ISD::TokenFactor, N->getDebugLoc(), MVT::Other,
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