From 4271a1ff33802b4be06945d6ee6b45f8b6bedc74 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Sat, 18 Jun 2022 10:17:22 -0700 Subject: [PATCH] [llvm] Call *set::insert without checking membership first (NFC) --- .../include/llvm/Analysis/IRSimilarityIdentifier.h | 8 ++------ llvm/lib/CodeGen/CodeGenPrepare.cpp | 14 ++++---------- llvm/lib/CodeGen/MachinePipeliner.cpp | 3 +-- llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 4 +--- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 3 +-- llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 3 +-- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 4 +--- .../WebAssemblyFixIrreducibleControlFlow.cpp | 4 +--- 8 files changed, 12 insertions(+), 31 deletions(-) diff --git a/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h b/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h index ffad1e0bd693..20fa7a9464a8 100644 --- a/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h +++ b/llvm/include/llvm/Analysis/IRSimilarityIdentifier.h @@ -831,8 +831,6 @@ public: void getBasicBlocks(DenseSet &BBSet) const { for (IRInstructionData &ID : *this) { BasicBlock *BB = ID.Inst->getParent(); - if (BBSet.contains(BB)) - continue; BBSet.insert(BB); } } @@ -843,10 +841,8 @@ public: SmallVector &BBList) const { for (IRInstructionData &ID : *this) { BasicBlock *BB = ID.Inst->getParent(); - if (BBSet.contains(BB)) - continue; - BBSet.insert(BB); - BBList.push_back(BB); + if (BBSet.insert(BB).second) + BBList.push_back(BB); } } diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index 85d8afb0da6e..4b5f37e2ab96 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -6020,31 +6020,25 @@ bool CodeGenPrepare::optimizePhiType( for (Value *V : Phi->incoming_values()) { if (auto *OpPhi = dyn_cast(V)) { if (!PhiNodes.count(OpPhi)) { - if (Visited.count(OpPhi)) + if (!Visited.insert(OpPhi).second) return false; PhiNodes.insert(OpPhi); - Visited.insert(OpPhi); Worklist.push_back(OpPhi); } } else if (auto *OpLoad = dyn_cast(V)) { if (!OpLoad->isSimple()) return false; - if (!Defs.count(OpLoad)) { - Defs.insert(OpLoad); + if (Defs.insert(OpLoad).second) Worklist.push_back(OpLoad); - } } else if (auto *OpEx = dyn_cast(V)) { - if (!Defs.count(OpEx)) { - Defs.insert(OpEx); + if (Defs.insert(OpEx).second) Worklist.push_back(OpEx); - } } else if (auto *OpBC = dyn_cast(V)) { if (!ConvertTy) ConvertTy = OpBC->getOperand(0)->getType(); if (OpBC->getOperand(0)->getType() != ConvertTy) return false; - if (!Defs.count(OpBC)) { - Defs.insert(OpBC); + if (Defs.insert(OpBC).second) { Worklist.push_back(OpBC); AnyAnchored |= !isa(OpBC->getOperand(0)) && !isa(OpBC->getOperand(0)); diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp index ecb687058a8e..8d500398f55e 100644 --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -1298,8 +1298,7 @@ bool SwingSchedulerDAG::Circuits::circuit(int V, int S, NodeSetType &NodeSets, for (auto W : AdjK[V]) { if (W < S) continue; - if (B[W].count(SV) == 0) - B[W].insert(SV); + B[W].insert(SV); } } Stack.pop_back(); diff --git a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp index b31b709c0c0a..d12689970dc5 100644 --- a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp +++ b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp @@ -528,10 +528,8 @@ static void handleNormalInst(const MachineInstr &MI, LOHInfo *LOHInfos) { // count as MultiUser or block optimization. This is especially important on // arm64_32, where any memory operation is likely to be an explicit use of // xN and an implicit use of wN (the base address register). - if (!UsesSeen.count(Idx)) { + if (UsesSeen.insert(Idx).second) handleUse(MI, MO, LOHInfos[Idx]); - UsesSeen.insert(Idx); - } } } diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 5e86ea30e1d9..8de7fae1c789 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -3464,8 +3464,7 @@ AMDGPUAsmParser::validateConstantBusLimitations(const MCInst &Inst, // flat_scratch_lo, flat_scratch_hi // are theoretically valid but they are disabled anyway. // Note that this code mimics SIInstrInfo::verifyInstruction - if (!SGPRsUsed.count(LastSGPR)) { - SGPRsUsed.insert(LastSGPR); + if (SGPRsUsed.insert(LastSGPR).second) { ++ConstantBusUseCount; } } else { // Expression or a literal diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp index 6a6987942b0f..70a411c10463 100644 --- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp +++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp @@ -349,8 +349,7 @@ void SIWholeQuadMode::markDefs(const MachineInstr &UseMI, LiveRange &LR, const VNInfo *NextValue = nullptr; const VisitKey Key(Value, DefinedLanes); - if (!Visited.count(Key)) { - Visited.insert(Key); + if (Visited.insert(Key).second) { // On first visit to a phi then start processing first predecessor NextPredIdx = 0; } diff --git a/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp b/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp index 068b0090589e..2d49fa369642 100644 --- a/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp +++ b/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp @@ -192,10 +192,8 @@ private: void push_back(Value *V) { // Do not push back duplicates. - if (!S.count(V)) { + if (S.insert(V).second) Q.push_back(V); - S.insert(V); - } } Value *pop_front_val() { diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp index 80792298c4bb..83e71d731bfa 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp @@ -222,10 +222,8 @@ private: assert(!Enterers.count(MBB)); if (Blocks.insert(MBB).second) { for (auto *Pred : MBB->predecessors()) { - if (!AddedToWorkList.count(Pred)) { + if (AddedToWorkList.insert(Pred).second) WorkList.push_back(Pred); - AddedToWorkList.insert(Pred); - } } } }