forked from OSchip/llvm-project
Revert "[FastISel][AArch64] Add custom lowering for GEPs."
This breaks our internal build bots. Reverting it to get the bots green again. llvm-svn: 219776
This commit is contained in:
Juergen Ributzka
parent
1573d73367
commit
42379d4cf7
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@ -134,7 +134,6 @@ private:
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bool selectBitCast(const Instruction *I);
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bool selectFRem(const Instruction *I);
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bool selectSDiv(const Instruction *I);
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bool selectGetElementPtr(const Instruction *I);
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// Utility helper routines.
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bool isTypeLegal(Type *Ty, MVT &VT);
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@ -4542,88 +4541,6 @@ bool AArch64FastISel::selectSDiv(const Instruction *I) {
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return true;
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}
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bool AArch64FastISel::selectGetElementPtr(const Instruction *I) {
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unsigned N = getRegForValue(I->getOperand(0));
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if (!N)
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return false;
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bool NIsKill = hasTrivialKill(I->getOperand(0));
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// Keep a running tab of the total offset to coalesce multiple N = N + Offset
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// into a single N = N + TotalOffset.
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uint64_t TotalOffs = 0;
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Type *Ty = I->getOperand(0)->getType();
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MVT VT = TLI.getPointerTy();
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for (auto OI = std::next(I->op_begin()), E = I->op_end(); OI != E; ++OI) {
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const Value *Idx = *OI;
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if (auto *StTy = dyn_cast<StructType>(Ty)) {
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unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
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// N = N + Offset
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if (Field)
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TotalOffs += DL.getStructLayout(StTy)->getElementOffset(Field);
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Ty = StTy->getElementType(Field);
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} else {
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Ty = cast<SequentialType>(Ty)->getElementType();
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// If this is a constant subscript, handle it quickly.
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if (const auto *CI = dyn_cast<ConstantInt>(Idx)) {
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if (CI->isZero())
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continue;
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// N = N + Offset
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TotalOffs +=
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DL.getTypeAllocSize(Ty) * cast<ConstantInt>(CI)->getSExtValue();
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continue;
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}
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if (TotalOffs) {
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N = emitAddSub_ri(/*UseAdd=*/true, VT, N, NIsKill, TotalOffs);
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if (!N) {
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unsigned C = fastEmit_i(VT, VT, ISD::Constant, TotalOffs);
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if (!C)
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return false;
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N = emitAddSub_rr(/*UseAdd=*/true, VT, N, NIsKill, C, true);
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if (!N)
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return false;
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}
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NIsKill = true;
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TotalOffs = 0;
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}
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// N = N + Idx * ElementSize;
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uint64_t ElementSize = DL.getTypeAllocSize(Ty);
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std::pair<unsigned, bool> Pair = getRegForGEPIndex(Idx);
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unsigned IdxN = Pair.first;
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bool IdxNIsKill = Pair.second;
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if (!IdxN)
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return false;
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if (ElementSize != 1) {
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unsigned C = fastEmit_i(VT, VT, ISD::Constant, ElementSize);
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if (!C)
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return false;
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IdxN = emitMul_rr(VT, IdxN, IdxNIsKill, C, true);
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if (!IdxN)
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return false;
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IdxNIsKill = true;
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}
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N = fastEmit_rr(VT, VT, ISD::ADD, N, NIsKill, IdxN, IdxNIsKill);
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if (!N)
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return false;
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}
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}
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if (TotalOffs) {
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N = emitAddSub_ri(/*UseAdd=*/true, VT, N, NIsKill, TotalOffs);
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if (!N) {
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unsigned C = fastEmit_i(VT, VT, ISD::Constant, TotalOffs);
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if (!C)
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return false;
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N = emitAddSub_rr(/*UseAdd=*/true, VT, N, NIsKill, C, true);
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if (!N)
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return false;
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}
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}
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updateValueMap(I, N);
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return true;
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}
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bool AArch64FastISel::fastSelectInstruction(const Instruction *I) {
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switch (I->getOpcode()) {
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default:
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@ -4695,8 +4612,6 @@ bool AArch64FastISel::fastSelectInstruction(const Instruction *I) {
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return selectRet(I);
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case Instruction::FRem:
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return selectFRem(I);
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case Instruction::GetElementPtr:
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return selectGetElementPtr(I);
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}
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// fall-back to target-independent instruction selection.
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@ -15,8 +15,9 @@ define void @main() nounwind {
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entry:
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; CHECK: main
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; CHECK: mov x29, sp
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; CHECK: mov [[REG:x[0-9]+]], sp
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; CHECK-NEXT: add x0, [[REG]], #8
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; CHECK: mov x[[REG:[0-9]+]], sp
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; CHECK-NEXT: orr x[[REG1:[0-9]+]], xzr, #0x8
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; CHECK-NEXT: add x0, x[[REG]], x[[REG1]]
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%E = alloca %struct.S2Ty, align 4
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%B = getelementptr inbounds %struct.S2Ty* %E, i32 0, i32 1
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call void @takeS1(%struct.S1Ty* %B)
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@ -1,18 +0,0 @@
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; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
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%struct.foo = type { i32, i64, float, double }
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define double* @test_struct(%struct.foo* %f) {
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; CHECK-LABEL: test_struct
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; CHECK: add x0, x0, #24
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%1 = getelementptr inbounds %struct.foo* %f, i64 0, i32 3
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ret double* %1
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}
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define i32* @test_array(i32* %a, i64 %i) {
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; CHECK-LABEL: test_array
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; CHECK: orr [[REG:x[0-9]+]], xzr, #0x4
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; CHECK-NEXT: madd x0, x1, [[REG]], x0
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%1 = getelementptr inbounds i32* %a, i64 %i
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ret i32* %1
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}
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