forked from OSchip/llvm-project
Add the IncludeSelf parameter to the MCSubRegIterator and MCSuperRegIterator
constructors. No functional change. Part of rdar://12906217 llvm-svn: 182490
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@ -421,20 +421,28 @@ public:
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// aliasing registers. Use these iterator classes to traverse the lists.
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/// MCSubRegIterator enumerates all sub-registers of Reg.
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/// If IncludeSelf is set, Reg itself is included in the list.
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class MCSubRegIterator : public MCRegisterInfo::DiffListIterator {
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public:
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MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) {
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MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI,
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bool IncludeSelf = false) {
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init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs);
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++*this;
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// Initially, the iterator points to Reg itself.
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if (!IncludeSelf)
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++*this;
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}
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};
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/// MCSuperRegIterator enumerates all super-registers of Reg.
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/// If IncludeSelf is set, Reg itself is included in the list.
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class MCSuperRegIterator : public MCRegisterInfo::DiffListIterator {
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public:
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MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) {
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MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI,
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bool IncludeSelf = false) {
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init(Reg, MCRI->DiffLists + MCRI->get(Reg).SuperRegs);
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++*this;
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// Initially, the iterator points to Reg itself.
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if (!IncludeSelf)
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++*this;
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}
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};
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@ -443,7 +451,7 @@ public:
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class MCRegAliasIterator : public MCRegisterInfo::DiffListIterator {
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public:
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MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI,
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bool IncludeSelf) {
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bool IncludeSelf = false) {
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init(Reg, MCRI->DiffLists + MCRI->get(Reg).Overlaps);
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// Initially, the iterator points to Reg itself.
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if (!IncludeSelf)
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