forked from OSchip/llvm-project
[VE] enable unaligned load/store isel
Summary: Enable unaligned load/store isel for iN and fp32/64 and tests. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D73448
This commit is contained in:
Kazushi (Jam) Marukawa
Simon Moll
parent
879c825cb8
commit
422dfea577
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@ -206,6 +206,27 @@ bool VETargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
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return VT == MVT::f32 || VT == MVT::f64;
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}
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/// Determine if the target supports unaligned memory accesses.
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///
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/// This function returns true if the target allows unaligned memory accesses
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/// of the specified type in the given address space. If true, it also returns
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/// whether the unaligned memory access is "fast" in the last argument by
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/// reference. This is used, for example, in situations where an array
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/// copy/move/set is converted to a sequence of store operations. Its use
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/// helps to ensure that such replacements don't generate code that causes an
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/// alignment error (trap) on the target machine.
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bool VETargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
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unsigned AddrSpace,
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unsigned Align,
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MachineMemOperand::Flags,
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bool *Fast) const {
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if (Fast) {
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// It's fast anytime on VE
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*Fast = true;
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}
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return true;
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}
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VETargetLowering::VETargetLowering(const TargetMachine &TM,
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const VESubtarget &STI)
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: TargetLowering(TM), Subtarget(&STI) {
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@ -77,6 +77,11 @@ public:
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bool isFPImmLegal(const APFloat &Imm, EVT VT,
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bool ForCodeSize) const override;
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/// Returns true if the target allows unaligned memory accesses of the
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/// specified type.
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bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AS, unsigned Align,
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MachineMemOperand::Flags Flags,
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bool *Fast) const override;
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};
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} // namespace llvm
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@ -0,0 +1,153 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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@vi8 = common dso_local local_unnamed_addr global i8 0, align 1
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@vi16 = common dso_local local_unnamed_addr global i16 0, align 1
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@vi32 = common dso_local local_unnamed_addr global i32 0, align 1
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@vi64 = common dso_local local_unnamed_addr global i64 0, align 1
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@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 1
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@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 1
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; Function Attrs: norecurse nounwind readonly
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define double @loadf64stk() {
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; CHECK-LABEL: loadf64stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld %s0, 184(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca double, align 1
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%1 = load double, double* %addr, align 1
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ret double %1
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}
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; Function Attrs: norecurse nounwind readonly
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define float @loadf32stk() {
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; CHECK-LABEL: loadf32stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ldu %s0, 188(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca float, align 1
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%1 = load float, float* %addr, align 1
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ret float %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @loadi64stk() {
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; CHECK-LABEL: loadi64stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld %s0, 184(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i64, align 1
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%1 = load i64, i64* %addr, align 1
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ret i64 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i32 @loadi32stk() {
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; CHECK-LABEL: loadi32stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ldl.sx %s0, 188(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i32, align 1
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%1 = load i32, i32* %addr, align 1
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ret i32 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i16 @loadi16stk() {
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; CHECK-LABEL: loadi16stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld2b.zx %s0, 190(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i16, align 1
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%1 = load i16, i16* %addr, align 1
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ret i16 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i8 @loadi8stk() {
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; CHECK-LABEL: loadi8stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld1b.zx %s0, 191(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i8, align 1
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%1 = load i8, i8* %addr, align 1
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ret i8 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define double @loadf64com() {
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; CHECK-LABEL: loadf64com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vf64@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vf64@hi(%s0)
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; CHECK-NEXT: ld %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load double, double* @vf64, align 1
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ret double %1
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}
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; Function Attrs: norecurse nounwind readonly
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define float @loadf32com() {
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; CHECK-LABEL: loadf32com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vf32@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vf32@hi(%s0)
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; CHECK-NEXT: ldu %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load float, float* @vf32, align 1
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ret float %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @loadi64com() {
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; CHECK-LABEL: loadi64com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi64@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi64@hi(%s0)
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; CHECK-NEXT: ld %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i64, i64* @vi64, align 1
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ret i64 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i32 @loadi32com() {
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; CHECK-LABEL: loadi32com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi32@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi32@hi(%s0)
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; CHECK-NEXT: ldl.sx %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i32, i32* @vi32, align 1
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ret i32 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i16 @loadi16com() {
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; CHECK-LABEL: loadi16com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi16@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi16@hi(%s0)
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; CHECK-NEXT: ld2b.zx %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i16, i16* @vi16, align 1
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ret i16 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i8 @loadi8com() {
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; CHECK-LABEL: loadi8com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi8@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi8@hi(%s0)
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; CHECK-NEXT: ld1b.zx %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i8, i8* @vi8, align 1
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ret i8 %1
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}
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@ -0,0 +1,153 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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@vi8 = common dso_local local_unnamed_addr global i8 0, align 2
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@vi16 = common dso_local local_unnamed_addr global i16 0, align 2
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@vi32 = common dso_local local_unnamed_addr global i32 0, align 2
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@vi64 = common dso_local local_unnamed_addr global i64 0, align 2
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@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 2
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@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 2
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; Function Attrs: norecurse nounwind readonly
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define double @loadf64stk() {
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; CHECK-LABEL: loadf64stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld %s0, 184(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca double, align 2
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%1 = load double, double* %addr, align 2
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ret double %1
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}
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; Function Attrs: norecurse nounwind readonly
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define float @loadf32stk() {
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; CHECK-LABEL: loadf32stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ldu %s0, 188(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca float, align 2
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%1 = load float, float* %addr, align 2
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ret float %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @loadi64stk() {
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; CHECK-LABEL: loadi64stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld %s0, 184(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i64, align 2
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%1 = load i64, i64* %addr, align 2
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ret i64 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i32 @loadi32stk() {
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; CHECK-LABEL: loadi32stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ldl.sx %s0, 188(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i32, align 2
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%1 = load i32, i32* %addr, align 2
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ret i32 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i16 @loadi16stk() {
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; CHECK-LABEL: loadi16stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld2b.zx %s0, 190(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i16, align 2
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%1 = load i16, i16* %addr, align 2
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ret i16 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i8 @loadi8stk() {
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; CHECK-LABEL: loadi8stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld1b.zx %s0, 190(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i8, align 2
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%1 = load i8, i8* %addr, align 2
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ret i8 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define double @loadf64com() {
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; CHECK-LABEL: loadf64com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vf64@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vf64@hi(%s0)
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; CHECK-NEXT: ld %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load double, double* @vf64, align 2
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ret double %1
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}
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; Function Attrs: norecurse nounwind readonly
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define float @loadf32com() {
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; CHECK-LABEL: loadf32com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vf32@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vf32@hi(%s0)
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; CHECK-NEXT: ldu %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load float, float* @vf32, align 2
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ret float %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @loadi64com() {
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; CHECK-LABEL: loadi64com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi64@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi64@hi(%s0)
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; CHECK-NEXT: ld %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i64, i64* @vi64, align 2
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ret i64 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i32 @loadi32com() {
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; CHECK-LABEL: loadi32com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi32@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi32@hi(%s0)
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; CHECK-NEXT: ldl.sx %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i32, i32* @vi32, align 2
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ret i32 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i16 @loadi16com() {
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; CHECK-LABEL: loadi16com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi16@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi16@hi(%s0)
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; CHECK-NEXT: ld2b.zx %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i16, i16* @vi16, align 2
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ret i16 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i8 @loadi8com() {
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; CHECK-LABEL: loadi8com:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s0, vi8@lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, vi8@hi(%s0)
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; CHECK-NEXT: ld1b.zx %s0, (,%s0)
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; CHECK-NEXT: or %s11, 0, %s9
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%1 = load i8, i8* @vi8, align 2
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ret i8 %1
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}
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@ -0,0 +1,153 @@
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; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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@vi8 = common dso_local local_unnamed_addr global i8 0, align 4
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@vi16 = common dso_local local_unnamed_addr global i16 0, align 4
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@vi32 = common dso_local local_unnamed_addr global i32 0, align 4
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@vi64 = common dso_local local_unnamed_addr global i64 0, align 4
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@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 4
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@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 4
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; Function Attrs: norecurse nounwind readonly
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define double @loadf64stk() {
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; CHECK-LABEL: loadf64stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld %s0, 184(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca double, align 4
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%1 = load double, double* %addr, align 4
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ret double %1
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}
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; Function Attrs: norecurse nounwind readonly
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define float @loadf32stk() {
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; CHECK-LABEL: loadf32stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ldu %s0, 188(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca float, align 4
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%1 = load float, float* %addr, align 4
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ret float %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i64 @loadi64stk() {
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; CHECK-LABEL: loadi64stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ld %s0, 184(,%s11)
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; CHECK-NEXT: or %s11, 0, %s9
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%addr = alloca i64, align 4
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%1 = load i64, i64* %addr, align 4
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ret i64 %1
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}
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; Function Attrs: norecurse nounwind readonly
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define i32 @loadi32stk() {
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; CHECK-LABEL: loadi32stk:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: ldl.sx %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i32, align 4
|
||||
%1 = load i32, i32* %addr, align 4
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i16 @loadi16stk() {
|
||||
; CHECK-LABEL: loadi16stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ld2b.zx %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i16, align 4
|
||||
%1 = load i16, i16* %addr, align 4
|
||||
ret i16 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i8 @loadi8stk() {
|
||||
; CHECK-LABEL: loadi8stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ld1b.zx %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i8, align 4
|
||||
%1 = load i8, i8* %addr, align 4
|
||||
ret i8 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define double @loadf64com() {
|
||||
; CHECK-LABEL: loadf64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vf64@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vf64@hi(%s0)
|
||||
; CHECK-NEXT: ld %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load double, double* @vf64, align 4
|
||||
ret double %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define float @loadf32com() {
|
||||
; CHECK-LABEL: loadf32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vf32@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vf32@hi(%s0)
|
||||
; CHECK-NEXT: ldu %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load float, float* @vf32, align 4
|
||||
ret float %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i64 @loadi64com() {
|
||||
; CHECK-LABEL: loadi64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi64@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi64@hi(%s0)
|
||||
; CHECK-NEXT: ld %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i64, i64* @vi64, align 4
|
||||
ret i64 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i32 @loadi32com() {
|
||||
; CHECK-LABEL: loadi32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi32@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi32@hi(%s0)
|
||||
; CHECK-NEXT: ldl.sx %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i32, i32* @vi32, align 4
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i16 @loadi16com() {
|
||||
; CHECK-LABEL: loadi16com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi16@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi16@hi(%s0)
|
||||
; CHECK-NEXT: ld2b.zx %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i16, i16* @vi16, align 4
|
||||
ret i16 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i8 @loadi8com() {
|
||||
; CHECK-LABEL: loadi8com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi8@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi8@hi(%s0)
|
||||
; CHECK-NEXT: ld1b.zx %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i8, i8* @vi8, align 4
|
||||
ret i8 %1
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
|
||||
|
||||
@vi8 = common dso_local local_unnamed_addr global i8 0, align 8
|
||||
@vi16 = common dso_local local_unnamed_addr global i16 0, align 8
|
||||
@vi32 = common dso_local local_unnamed_addr global i32 0, align 8
|
||||
@vi64 = common dso_local local_unnamed_addr global i64 0, align 8
|
||||
@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 8
|
||||
@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 8
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define double @loadf64stk() {
|
||||
; CHECK-LABEL: loadf64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ld %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca double, align 8
|
||||
%1 = load double, double* %addr, align 8
|
||||
ret double %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define float @loadf32stk() {
|
||||
; CHECK-LABEL: loadf32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ldu %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca float, align 8
|
||||
%1 = load float, float* %addr, align 8
|
||||
ret float %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i64 @loadi64stk() {
|
||||
; CHECK-LABEL: loadi64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ld %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i64, align 8
|
||||
%1 = load i64, i64* %addr, align 8
|
||||
ret i64 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i32 @loadi32stk() {
|
||||
; CHECK-LABEL: loadi32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ldl.sx %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i32, align 8
|
||||
%1 = load i32, i32* %addr, align 8
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i16 @loadi16stk() {
|
||||
; CHECK-LABEL: loadi16stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ld2b.zx %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i16, align 8
|
||||
%1 = load i16, i16* %addr, align 8
|
||||
ret i16 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i8 @loadi8stk() {
|
||||
; CHECK-LABEL: loadi8stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: ld1b.zx %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i8, align 8
|
||||
%1 = load i8, i8* %addr, align 8
|
||||
ret i8 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define double @loadf64com() {
|
||||
; CHECK-LABEL: loadf64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vf64@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vf64@hi(%s0)
|
||||
; CHECK-NEXT: ld %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load double, double* @vf64, align 8
|
||||
ret double %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define float @loadf32com() {
|
||||
; CHECK-LABEL: loadf32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vf32@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vf32@hi(%s0)
|
||||
; CHECK-NEXT: ldu %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load float, float* @vf32, align 8
|
||||
ret float %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i64 @loadi64com() {
|
||||
; CHECK-LABEL: loadi64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi64@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi64@hi(%s0)
|
||||
; CHECK-NEXT: ld %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i64, i64* @vi64, align 8
|
||||
ret i64 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i32 @loadi32com() {
|
||||
; CHECK-LABEL: loadi32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi32@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi32@hi(%s0)
|
||||
; CHECK-NEXT: ldl.sx %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i32, i32* @vi32, align 8
|
||||
ret i32 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i16 @loadi16com() {
|
||||
; CHECK-LABEL: loadi16com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi16@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi16@hi(%s0)
|
||||
; CHECK-NEXT: ld2b.zx %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i16, i16* @vi16, align 8
|
||||
ret i16 %1
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define i8 @loadi8com() {
|
||||
; CHECK-LABEL: loadi8com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s0, vi8@lo
|
||||
; CHECK-NEXT: and %s0, %s0, (32)0
|
||||
; CHECK-NEXT: lea.sl %s0, vi8@hi(%s0)
|
||||
; CHECK-NEXT: ld1b.zx %s0, (,%s0)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%1 = load i8, i8* @vi8, align 8
|
||||
ret i8 %1
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
|
||||
|
||||
@vi8 = common dso_local local_unnamed_addr global i8 0, align 1
|
||||
@vi16 = common dso_local local_unnamed_addr global i16 0, align 1
|
||||
@vi32 = common dso_local local_unnamed_addr global i32 0, align 1
|
||||
@vi64 = common dso_local local_unnamed_addr global i64 0, align 1
|
||||
@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 1
|
||||
@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 1
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64stk(double %0) {
|
||||
; CHECK-LABEL: storef64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca double, align 1
|
||||
store double %0, double* %addr, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32stk(float %0) {
|
||||
; CHECK-LABEL: storef32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stu %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca float, align 1
|
||||
store float %0, float* %addr, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64stk(i64 %0) {
|
||||
; CHECK-LABEL: storei64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i64, align 1
|
||||
store i64 %0, i64* %addr, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32stk(i32 %0) {
|
||||
; CHECK-LABEL: storei32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stl %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i32, align 1
|
||||
store i32 %0, i32* %addr, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16stk(i16 %0) {
|
||||
; CHECK-LABEL: storei16stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st2b %s0, 190(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i16, align 1
|
||||
store i16 %0, i16* %addr, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8stk(i8 %0) {
|
||||
; CHECK-LABEL: storei8stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st1b %s0, 191(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i8, align 1
|
||||
store i8 %0, i8* %addr, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64com(double %0) {
|
||||
; CHECK-LABEL: storef64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store double %0, double* @vf64, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32com(float %0) {
|
||||
; CHECK-LABEL: storef32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf32@hi(%s1)
|
||||
; CHECK-NEXT: stu %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store float %0, float* @vf32, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64com(i64 %0) {
|
||||
; CHECK-LABEL: storei64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i64 %0, i64* @vi64, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32com(i32 %0) {
|
||||
; CHECK-LABEL: storei32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi32@hi(%s1)
|
||||
; CHECK-NEXT: stl %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i32 %0, i32* @vi32, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16com(i16 %0) {
|
||||
; CHECK-LABEL: storei16com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi16@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi16@hi(%s1)
|
||||
; CHECK-NEXT: st2b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i16 %0, i16* @vi16, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8com(i8 %0) {
|
||||
; CHECK-LABEL: storei8com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi8@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi8@hi(%s1)
|
||||
; CHECK-NEXT: st1b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i8 %0, i8* @vi8, align 1
|
||||
ret void
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
|
||||
|
||||
@vi8 = common dso_local local_unnamed_addr global i8 0, align 2
|
||||
@vi16 = common dso_local local_unnamed_addr global i16 0, align 2
|
||||
@vi32 = common dso_local local_unnamed_addr global i32 0, align 2
|
||||
@vi64 = common dso_local local_unnamed_addr global i64 0, align 2
|
||||
@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 2
|
||||
@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 2
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64stk(double %0) {
|
||||
; CHECK-LABEL: storef64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca double, align 2
|
||||
store double %0, double* %addr, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32stk(float %0) {
|
||||
; CHECK-LABEL: storef32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stu %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca float, align 2
|
||||
store float %0, float* %addr, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64stk(i64 %0) {
|
||||
; CHECK-LABEL: storei64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i64, align 2
|
||||
store i64 %0, i64* %addr, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32stk(i32 %0) {
|
||||
; CHECK-LABEL: storei32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stl %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i32, align 2
|
||||
store i32 %0, i32* %addr, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16stk(i16 %0) {
|
||||
; CHECK-LABEL: storei16stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st2b %s0, 190(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i16, align 2
|
||||
store i16 %0, i16* %addr, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8stk(i8 %0) {
|
||||
; CHECK-LABEL: storei8stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st1b %s0, 190(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i8, align 2
|
||||
store i8 %0, i8* %addr, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64com(double %0) {
|
||||
; CHECK-LABEL: storef64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store double %0, double* @vf64, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32com(float %0) {
|
||||
; CHECK-LABEL: storef32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf32@hi(%s1)
|
||||
; CHECK-NEXT: stu %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store float %0, float* @vf32, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64com(i64 %0) {
|
||||
; CHECK-LABEL: storei64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i64 %0, i64* @vi64, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32com(i32 %0) {
|
||||
; CHECK-LABEL: storei32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi32@hi(%s1)
|
||||
; CHECK-NEXT: stl %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i32 %0, i32* @vi32, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16com(i16 %0) {
|
||||
; CHECK-LABEL: storei16com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi16@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi16@hi(%s1)
|
||||
; CHECK-NEXT: st2b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i16 %0, i16* @vi16, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8com(i8 %0) {
|
||||
; CHECK-LABEL: storei8com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi8@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi8@hi(%s1)
|
||||
; CHECK-NEXT: st1b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i8 %0, i8* @vi8, align 2
|
||||
ret void
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
|
||||
|
||||
@vi8 = common dso_local local_unnamed_addr global i8 0, align 4
|
||||
@vi16 = common dso_local local_unnamed_addr global i16 0, align 4
|
||||
@vi32 = common dso_local local_unnamed_addr global i32 0, align 4
|
||||
@vi64 = common dso_local local_unnamed_addr global i64 0, align 4
|
||||
@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 4
|
||||
@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 4
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64stk(double %0) {
|
||||
; CHECK-LABEL: storef64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca double, align 4
|
||||
store double %0, double* %addr, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32stk(float %0) {
|
||||
; CHECK-LABEL: storef32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stu %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca float, align 4
|
||||
store float %0, float* %addr, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64stk(i64 %0) {
|
||||
; CHECK-LABEL: storei64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i64, align 4
|
||||
store i64 %0, i64* %addr, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32stk(i32 %0) {
|
||||
; CHECK-LABEL: storei32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stl %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i32, align 4
|
||||
store i32 %0, i32* %addr, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16stk(i16 %0) {
|
||||
; CHECK-LABEL: storei16stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st2b %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i16, align 4
|
||||
store i16 %0, i16* %addr, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8stk(i8 %0) {
|
||||
; CHECK-LABEL: storei8stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st1b %s0, 188(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i8, align 4
|
||||
store i8 %0, i8* %addr, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64com(double %0) {
|
||||
; CHECK-LABEL: storef64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store double %0, double* @vf64, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32com(float %0) {
|
||||
; CHECK-LABEL: storef32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf32@hi(%s1)
|
||||
; CHECK-NEXT: stu %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store float %0, float* @vf32, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64com(i64 %0) {
|
||||
; CHECK-LABEL: storei64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i64 %0, i64* @vi64, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32com(i32 %0) {
|
||||
; CHECK-LABEL: storei32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi32@hi(%s1)
|
||||
; CHECK-NEXT: stl %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i32 %0, i32* @vi32, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16com(i16 %0) {
|
||||
; CHECK-LABEL: storei16com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi16@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi16@hi(%s1)
|
||||
; CHECK-NEXT: st2b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i16 %0, i16* @vi16, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8com(i8 %0) {
|
||||
; CHECK-LABEL: storei8com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi8@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi8@hi(%s1)
|
||||
; CHECK-NEXT: st1b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i8 %0, i8* @vi8, align 4
|
||||
ret void
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
|
||||
|
||||
@vi8 = common dso_local local_unnamed_addr global i8 0, align 8
|
||||
@vi16 = common dso_local local_unnamed_addr global i16 0, align 8
|
||||
@vi32 = common dso_local local_unnamed_addr global i32 0, align 8
|
||||
@vi64 = common dso_local local_unnamed_addr global i64 0, align 8
|
||||
@vf32 = common dso_local local_unnamed_addr global float 0.000000e+00, align 8
|
||||
@vf64 = common dso_local local_unnamed_addr global double 0.000000e+00, align 8
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64stk(double %0) {
|
||||
; CHECK-LABEL: storef64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca double, align 8
|
||||
store double %0, double* %addr, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32stk(float %0) {
|
||||
; CHECK-LABEL: storef32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stu %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca float, align 8
|
||||
store float %0, float* %addr, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64stk(i64 %0) {
|
||||
; CHECK-LABEL: storei64stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i64, align 8
|
||||
store i64 %0, i64* %addr, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32stk(i32 %0) {
|
||||
; CHECK-LABEL: storei32stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: stl %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i32, align 8
|
||||
store i32 %0, i32* %addr, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16stk(i16 %0) {
|
||||
; CHECK-LABEL: storei16stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st2b %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i16, align 8
|
||||
store i16 %0, i16* %addr, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8stk(i8 %0) {
|
||||
; CHECK-LABEL: storei8stk:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: st1b %s0, 184(,%s11)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
%addr = alloca i8, align 8
|
||||
store i8 %0, i8* %addr, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef64com(double %0) {
|
||||
; CHECK-LABEL: storef64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store double %0, double* @vf64, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storef32com(float %0) {
|
||||
; CHECK-LABEL: storef32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vf32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vf32@hi(%s1)
|
||||
; CHECK-NEXT: stu %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store float %0, float* @vf32, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei64com(i64 %0) {
|
||||
; CHECK-LABEL: storei64com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi64@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi64@hi(%s1)
|
||||
; CHECK-NEXT: st %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i64 %0, i64* @vi64, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei32com(i32 %0) {
|
||||
; CHECK-LABEL: storei32com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi32@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi32@hi(%s1)
|
||||
; CHECK-NEXT: stl %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i32 %0, i32* @vi32, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei16com(i16 %0) {
|
||||
; CHECK-LABEL: storei16com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi16@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi16@hi(%s1)
|
||||
; CHECK-NEXT: st2b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i16 %0, i16* @vi16, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
; Function Attrs: norecurse nounwind readonly
|
||||
define void @storei8com(i8 %0) {
|
||||
; CHECK-LABEL: storei8com:
|
||||
; CHECK: .LBB{{[0-9]+}}_2:
|
||||
; CHECK-NEXT: lea %s1, vi8@lo
|
||||
; CHECK-NEXT: and %s1, %s1, (32)0
|
||||
; CHECK-NEXT: lea.sl %s1, vi8@hi(%s1)
|
||||
; CHECK-NEXT: st1b %s0, (,%s1)
|
||||
; CHECK-NEXT: or %s11, 0, %s9
|
||||
store i8 %0, i8* @vi8, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue