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AMDGPU/GlobalISel: Define instruction mapping for G_FPTOSI 

Patch by Tom Stellard

llvm-svn: 326534
This commit is contained in:
Matt Arsenault 2018-03-02 02:19:16 +00:00
parent b23041ad4d
commit 41d2e3d98e
2 changed files with 32 additions and 0 deletions
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1
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
View File

@ -293,6 +293,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
// Fall-through // Fall-through
case AMDGPU::G_FADD: case AMDGPU::G_FADD:
case AMDGPU::G_FPTOSI:
case AMDGPU::G_FPTOUI: case AMDGPU::G_FPTOUI:
case AMDGPU::G_FMUL: case AMDGPU::G_FMUL:
return getDefaultMappingVOP(MI); return getDefaultMappingVOP(MI);

31
llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir Normal file
View File

@ -0,0 +1,31 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
name: fptosi_s
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: fptosi_s
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[FPTOSI:%[0-9]+]]:vgpr(s32) = G_FPTOSI [[COPY]](s32)
%0:_(s32) = COPY $sgpr0
%1:_(s32) = G_FPTOSI %0
...
---
name: fptosi_v
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fptosi_v
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[FPTOSI:%[0-9]+]]:vgpr(s32) = G_FPTOSI [[COPY]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_FPTOSI %0
...