forked from OSchip/llvm-project
[X86][AsmParser][MS-compatability] Binary/Unary operators enhancements
Introducing MOD binary operator https://msdn.microsoft.com/en-us/library/hha180wt.aspx Enhancing unary operators NEG and NOT, to support more complex patterns Differential Revision: https://reviews.llvm.org/D33876 llvm-svn: 306425
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Coby Tayree
parent
d9cc8fbcd3
commit
41a5b55f50
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@ -49,8 +49,11 @@ static const char OpPrecedence[] = {
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4, // IC_MINUS
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5, // IC_MULTIPLY
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5, // IC_DIVIDE
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6, // IC_RPAREN
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7, // IC_LPAREN
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5, // IC_MOD
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6, // IC_NOT
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7, // IC_NEG
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8, // IC_RPAREN
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9, // IC_LPAREN
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0, // IC_IMM
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0 // IC_REGISTER
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};
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@ -92,6 +95,9 @@ private:
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IC_MINUS,
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IC_MULTIPLY,
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IC_DIVIDE,
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IC_MOD,
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IC_NOT,
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IC_NEG,
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IC_RPAREN,
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IC_LPAREN,
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IC_IMM,
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@ -111,6 +117,10 @@ private:
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SmallVector<InfixCalculatorTok, 4> InfixOperatorStack;
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SmallVector<ICToken, 4> PostfixStack;
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bool isUnaryOperator(const InfixCalculatorTok Op) {
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return Op == IC_NEG || Op == IC_NOT;
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}
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public:
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int64_t popOperand() {
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assert (!PostfixStack.empty() && "Poped an empty stack!");
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@ -192,6 +202,22 @@ private:
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ICToken Op = PostfixStack[i];
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if (Op.first == IC_IMM || Op.first == IC_REGISTER) {
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OperandStack.push_back(Op);
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} else if (isUnaryOperator(Op.first)) {
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assert (OperandStack.size() > 0 && "Too few operands.");
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ICToken Operand = OperandStack.pop_back_val();
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assert (Operand.first == IC_IMM &&
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"Unary operation with a register!");
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switch (Op.first) {
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default:
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report_fatal_error("Unexpected operator!");
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break;
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case IC_NEG:
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OperandStack.push_back(std::make_pair(IC_IMM, -Operand.second));
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break;
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case IC_NOT:
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OperandStack.push_back(std::make_pair(IC_IMM, ~Operand.second));
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break;
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}
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} else {
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assert (OperandStack.size() > 1 && "Too few operands.");
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int64_t Val;
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@ -222,6 +248,12 @@ private:
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Val = Op1.second / Op2.second;
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OperandStack.push_back(std::make_pair(IC_IMM, Val));
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break;
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case IC_MOD:
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assert (Op1.first == IC_IMM && Op2.first == IC_IMM &&
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"Modulo operation with an immediate and a register!");
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Val = Op1.second % Op2.second;
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OperandStack.push_back(std::make_pair(IC_IMM, Val));
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break;
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case IC_OR:
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assert (Op1.first == IC_IMM && Op2.first == IC_IMM &&
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"Or operation with an immediate and a register!");
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@ -271,6 +303,7 @@ private:
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IES_NOT,
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IES_MULTIPLY,
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IES_DIVIDE,
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IES_MOD,
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IES_LBRAC,
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IES_RBRAC,
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IES_LPAREN,
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@ -421,10 +454,16 @@ private:
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default:
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State = IES_ERROR;
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break;
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case IES_OR:
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case IES_XOR:
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case IES_AND:
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case IES_LSHIFT:
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case IES_RSHIFT:
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case IES_PLUS:
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case IES_NOT:
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case IES_MULTIPLY:
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case IES_DIVIDE:
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case IES_MOD:
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case IES_LPAREN:
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case IES_RPAREN:
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case IES_LBRAC:
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@ -432,11 +471,12 @@ private:
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case IES_INTEGER:
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case IES_REGISTER:
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State = IES_MINUS;
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// Only push the minus operator if it is not a unary operator.
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if (!(CurrState == IES_PLUS || CurrState == IES_MINUS ||
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CurrState == IES_MULTIPLY || CurrState == IES_DIVIDE ||
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CurrState == IES_LPAREN || CurrState == IES_LBRAC))
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// push minus operator if it is not a negate operator
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if (CurrState == IES_REGISTER || CurrState == IES_RPAREN ||
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CurrState == IES_INTEGER || CurrState == IES_RBRAC)
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IC.pushOperator(IC_MINUS);
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else
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IC.pushOperator(IC_NEG);
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if (CurrState == IES_REGISTER && PrevState != IES_MULTIPLY) {
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// If we already have a BaseReg, then assume this is the IndexReg with
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// a scale of 1.
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@ -458,9 +498,21 @@ private:
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default:
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State = IES_ERROR;
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break;
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case IES_OR:
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case IES_XOR:
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case IES_AND:
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case IES_LSHIFT:
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case IES_RSHIFT:
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case IES_PLUS:
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case IES_MINUS:
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case IES_NOT:
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case IES_MULTIPLY:
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case IES_DIVIDE:
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case IES_MOD:
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case IES_LPAREN:
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case IES_LBRAC:
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State = IES_NOT;
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IC.pushOperator(IC_NOT);
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break;
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}
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PrevState = CurrState;
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@ -525,6 +577,7 @@ private:
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case IES_LSHIFT:
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case IES_RSHIFT:
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case IES_DIVIDE:
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case IES_MOD:
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case IES_MULTIPLY:
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case IES_LPAREN:
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State = IES_INTEGER;
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@ -539,26 +592,6 @@ private:
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}
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// Get the scale and replace the 'Register * Scale' with '0'.
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IC.popOperator();
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} else if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
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PrevState == IES_OR || PrevState == IES_AND ||
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PrevState == IES_LSHIFT || PrevState == IES_RSHIFT ||
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PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
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PrevState == IES_LPAREN || PrevState == IES_LBRAC ||
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PrevState == IES_NOT || PrevState == IES_XOR) &&
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CurrState == IES_MINUS) {
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// Unary minus. No need to pop the minus operand because it was never
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// pushed.
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IC.pushOperand(IC_IMM, -TmpInt); // Push -Imm.
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} else if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
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PrevState == IES_OR || PrevState == IES_AND ||
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PrevState == IES_LSHIFT || PrevState == IES_RSHIFT ||
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PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
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PrevState == IES_LPAREN || PrevState == IES_LBRAC ||
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PrevState == IES_NOT || PrevState == IES_XOR) &&
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CurrState == IES_NOT) {
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// Unary not. No need to pop the not operand because it was never
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// pushed.
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IC.pushOperand(IC_IMM, ~TmpInt); // Push ~Imm.
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} else {
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IC.pushOperand(IC_IMM, TmpInt);
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}
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@ -594,6 +627,19 @@ private:
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break;
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}
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}
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void onMod() {
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PrevState = State;
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switch (State) {
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default:
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State = IES_ERROR;
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break;
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case IES_INTEGER:
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case IES_RPAREN:
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State = IES_MOD;
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IC.pushOperator(IC_MOD);
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break;
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}
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}
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void onLBrac() {
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PrevState = State;
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switch (State) {
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@ -647,18 +693,8 @@ private:
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case IES_RSHIFT:
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case IES_MULTIPLY:
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case IES_DIVIDE:
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case IES_MOD:
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case IES_LPAREN:
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// FIXME: We don't handle this type of unary minus or not, yet.
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if ((PrevState == IES_PLUS || PrevState == IES_MINUS ||
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PrevState == IES_OR || PrevState == IES_AND ||
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PrevState == IES_LSHIFT || PrevState == IES_RSHIFT ||
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PrevState == IES_MULTIPLY || PrevState == IES_DIVIDE ||
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PrevState == IES_LPAREN || PrevState == IES_LBRAC ||
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PrevState == IES_NOT || PrevState == IES_XOR) &&
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(CurrState == IES_MINUS || CurrState == IES_NOT)) {
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State = IES_ERROR;
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break;
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}
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State = IES_LPAREN;
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IC.pushOperator(IC_LPAREN);
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break;
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@ -1302,6 +1338,8 @@ bool X86AsmParser::ParseIntelNamedOperator(StringRef Name, IntelExprStateMachine
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SM.onXor();
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else if (Name.equals_lower("and"))
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SM.onAnd();
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else if (Name.equals_lower("mod"))
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SM.onMod();
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else
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return false;
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return true;
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@ -56,3 +56,20 @@
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add eax, 6 XOR 3
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// CHECK: addl $5, %eax
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add eax, 6 XOR 3 shl 1 SHR 1
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// CHECK: movl $-9, %eax
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mov eax, not(1 shl 3)
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// CHECK: movl $-2, %eax
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mov eax, ~(0x8 shr 3)
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// CHECK: movl $-4, %eax
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mov eax, not(1 or 3)
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// CHECK: movl $-2, %eax
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mov eax, -(1 xor 3)
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// CHECK: movl $-2, %eax
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mov eax, not(1 and 3)
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// CHECK: movl $3, %eax
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mov eax, not(not 3)
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// CHECK: movl $-3, %eax
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mov eax, ~(5 mod 3)
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// CHECK: movl $-2, %eax
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mov eax, (-5 mod 3)
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