forked from OSchip/llvm-project
revert 99795, as mentioned, it is disabled anyway.
llvm-svn: 99796
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@ -102,106 +102,6 @@ void DAGISelEmitter::EmitPredicateFunctions(raw_ostream &OS) {
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OS << "\n\n";
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OS << "\n\n";
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}
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}
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/// CouldMatchSameInput - Return true if it is possible for these two patterns
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/// to match the same input. For example, (add reg, reg) and
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/// (add reg, (mul ...)) could both match the same input. Where this is
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/// conservative, it falls back to returning true.
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static bool CouldMatchSameInput(const TreePatternNode *N1,
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const TreePatternNode *N2) {
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// If the types of the two nodes differ, they can't match the same thing.
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if (N1->getNumTypes() != N2->getNumTypes()) return false;
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for (unsigned i = 0, e = N1->getNumTypes(); i != e; ++i)
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if (N1->getType(i) != N2->getType(i))
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return false;
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// Handle the case when at least one is a leaf.
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if (N1->isLeaf()) {
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if (N2->isLeaf()) {
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// Handle leaf/leaf cases. Register operands can match just about
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// anything, so we can only disambiguate a few things here.
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// If both operands are leaf integer nodes with different values, they
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// can't match the same thing.
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if (IntInit *II1 = dynamic_cast<IntInit*>(N1->getLeafValue()))
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if (IntInit *II2 = dynamic_cast<IntInit*>(N2->getLeafValue()))
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return II1->getValue() == II2->getValue();
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DefInit *DI1 = dynamic_cast<DefInit*>(N1->getLeafValue());
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DefInit *DI2 = dynamic_cast<DefInit*>(N2->getLeafValue());
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if (DI1 != 0 && DI2 != 0) {
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if (DI1->getDef()->isSubClassOf("ValueType") &&
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DI2->getDef()->isSubClassOf("ValueType"))
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return DI1 == DI2;
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if (DI1->getDef()->isSubClassOf("CondCode") &&
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DI2->getDef()->isSubClassOf("CondCode"))
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return DI1 == DI2;
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}
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// TODO: Regclass cannot match a condcode etc.
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// Otherwise, complex pattern could match anything, so just return a
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// conservative response.
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return true;
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}
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// Conservatively return true. (imm) could match "7" for example, and GPR
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// can match anything.
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// TODO: could handle (add ...) != "1" if we cared.
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return true;
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}
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// If N2 is a leaf and N1 isn't, check the other way.
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if (N2->isLeaf())
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return CouldMatchSameInput(N2, N1);
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// Now we know neither node is a leaf. If the two patterns have different
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// number of children or different operators, they can't both match.
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Record *Op1 = N1->getOperator(), *Op2 = N1->getOperator();
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if (Op1 != Op2 || N1->getNumChildren() != N2->getNumChildren())
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return false;
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// If a child prevents the two patterns from matching, use that.
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for (unsigned i = 0, e = N1->getNumChildren(); i != e; ++i)
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if (!CouldMatchSameInput(N1->getChild(i), N2->getChild(i)))
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return false;
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// Otherwise, it looks like they could both match the same thing.
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return true;
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}
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/// GetSourceMatchPreferenceOrdering - The two input patterns are guaranteed to
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/// not match the same input. Decide which pattern we'd prefer to match first
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/// in order to reduce compile time. This sorting predicate is used to improve
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/// compile time so that we try to match scalar operations before vector
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/// operations since scalar operations are much more common in practice.
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///
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/// This returns -1 if we prefer to match N1 before N2, 1 if we prefer to match
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/// N2 before N1 or 0 if no preference.
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///
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static int GetSourceMatchPreferenceOrdering(const TreePatternNode *N1,
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const TreePatternNode *N2) {
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// The primary thing we sort on here is to get ints before floats and scalars
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// before vectors.
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for (unsigned i = 0, e = std::min(N1->getNumTypes(), N2->getNumTypes());
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i != e; ++i)
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if (N1->getType(i) != N2->getType(i)) {
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MVT::SimpleValueType V1 = N1->getType(i), V2 = N2->getType(i);
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if (MVT(V1).isVector() != MVT(V2).isVector())
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return MVT(V1).isVector() ? 1 : -1;
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if (MVT(V1).isFloatingPoint() != MVT(V2).isFloatingPoint())
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return MVT(V1).isFloatingPoint() ? 1 : -1;
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}
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for (unsigned i = 0, e = std::min(N1->getNumChildren(), N2->getNumChildren());
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i != e; ++i)
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if (int Res = GetSourceMatchPreferenceOrdering(N1->getChild(i),
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N2->getChild(i)))
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return Res;
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return 0;
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}
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namespace {
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namespace {
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// PatternSortingPredicate - return true if we prefer to match LHS before RHS.
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// PatternSortingPredicate - return true if we prefer to match LHS before RHS.
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@ -212,28 +112,6 @@ struct PatternSortingPredicate {
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CodeGenDAGPatterns &CGP;
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CodeGenDAGPatterns &CGP;
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bool operator()(const PatternToMatch *LHS, const PatternToMatch *RHS) {
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bool operator()(const PatternToMatch *LHS, const PatternToMatch *RHS) {
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const TreePatternNode *LHSSrc = LHS->getSrcPattern();
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const TreePatternNode *RHSSrc = RHS->getSrcPattern();
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// If the patterns are guaranteed to not match at the same time and we
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// prefer to match one before the other (for compile time reasons) use this
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// preference as our discriminator.
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if (0 && !CouldMatchSameInput(LHSSrc, RHSSrc)) {
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int Ordering = GetSourceMatchPreferenceOrdering(LHSSrc, RHSSrc);
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if (Ordering != 0) {
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if (Ordering == -1) {
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errs() << "SORT: " << *LHSSrc << "\n";
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errs() << "NEXT: " << *RHSSrc << "\n\n";
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} else {
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errs() << "SORT: " << *RHSSrc << "\n";
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errs() << "NEXT: " << *LHSSrc << "\n\n";
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}
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}
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if (Ordering == -1) return true;
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if (Ordering == 1) return false;
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}
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// Otherwise, if the patterns might both match, sort based on complexity,
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// Otherwise, if the patterns might both match, sort based on complexity,
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// which means that we prefer to match patterns that cover more nodes in the
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// which means that we prefer to match patterns that cover more nodes in the
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// input over nodes that cover fewer.
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// input over nodes that cover fewer.
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@ -289,7 +167,8 @@ void DAGISelEmitter::run(raw_ostream &OS) {
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// We want to process the matches in order of minimal cost. Sort the patterns
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// We want to process the matches in order of minimal cost. Sort the patterns
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// so the least cost one is at the start.
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// so the least cost one is at the start.
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std::sort(Patterns.begin(), Patterns.end(), PatternSortingPredicate(CGP));
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std::stable_sort(Patterns.begin(), Patterns.end(),
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PatternSortingPredicate(CGP));
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// Convert each variant of each pattern into a Matcher.
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// Convert each variant of each pattern into a Matcher.
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