forked from OSchip/llvm-project
Flip the new block-placement pass to be on by default.
This is mostly to test the waters. I'd like to get results from FNT build bots and other bots running on non-x86 platforms. This feature has been pretty heavily tested over the last few months by me, and it fixes several of the execution time regressions caused by the inlining work by preventing inlining decisions from radically impacting block layout. I've seen very large improvements in yacr2 and ackermann benchmarks, along with the expected noise across all of the benchmark suite whenever code layout changes. I've analyzed all of the regressions and fixed them, or found them to be impossible to fix. See my email to llvmdev for more details. I'd like for this to be in 3.1 as it complements the inliner changes, but if any failures are showing up or anyone has concerns, it is just a flag flip and so can be easily turned off. I'm switching it on tonight to try and get at least one run through various folks' performance suites in case SPEC or something else has serious issues with it. I'll watch bots and revert if anything shows up. llvm-svn: 154816
This commit is contained in:
parent
a355e7cf82
commit
4190b507c5
|
@ -37,8 +37,9 @@ static cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden,
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cl::desc("Disable tail duplication"));
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static cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden,
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cl::desc("Disable pre-register allocation tail duplication"));
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static cl::opt<bool> EnableBlockPlacement("enable-block-placement",
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cl::Hidden, cl::desc("Enable probability-driven block placement"));
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static cl::opt<bool> DisableBlockPlacement("disable-block-placement",
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cl::Hidden, cl::desc("Disable the probability-driven block placement, and "
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"re-enable the old code placement pass"));
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static cl::opt<bool> EnableBlockPlacementStats("enable-block-placement-stats",
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cl::Hidden, cl::desc("Collect probability-driven block placement stats"));
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static cl::opt<bool> DisableCodePlace("disable-code-place", cl::Hidden,
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@ -610,10 +611,10 @@ void TargetPassConfig::addMachineLateOptimization() {
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/// Add standard basic block placement passes.
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void TargetPassConfig::addBlockPlacement() {
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AnalysisID ID = &NoPassID;
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if (EnableBlockPlacement) {
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// MachineBlockPlacement is an experimental pass which is disabled by
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// default currently. Eventually it should subsume CodePlacementOpt, so
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// when enabled, the other is disabled.
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if (!DisableBlockPlacement) {
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// MachineBlockPlacement is a new pass which subsumes the functionality of
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// CodPlacementOpt. The old code placement pass can be restored by
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// disabling block placement, but eventually it will be removed.
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ID = addPass(MachineBlockPlacementID);
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} else {
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ID = addPass(CodePlacementOptID);
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@ -26,7 +26,7 @@ bb2: ; preds = %bb1, %entry
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; CHECK: bb2
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; CHECK: subs [[REG:r[0-9]+]], #1
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; CHECK: cmp [[REG]], #0
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; CHECK: bgt
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; CHECK: ble
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%indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ]
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%tries.0 = sub i32 2147483647, %indvar
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%tmp1 = icmp sgt i32 %tries.0, 0
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@ -16,11 +16,11 @@ declare i8* @choose(i8*, i8*)
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; CHECK: tail_duplicate_me:
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; CHECK: qux
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; CHECK: qux
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; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK
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; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK
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; CHECK: str r
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; CHECK-NEXT: bx r
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; CHECK: qux
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; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK
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; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK
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; CHECK: str r
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@ -1,4 +1,4 @@
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; RUN: llc < %s -march=cellspu -o - | grep brnz
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; RUN: llc < %s -march=cellspu -o - | grep brz
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; PR3274
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target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
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@ -26,9 +26,9 @@ return: ; preds = %if.else, %if.end6
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define void @f1(float %f) nounwind {
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entry:
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; CHECK: bc1t $BB1_2
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; CHECK: bc1f $BB1_1
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; CHECK: nop
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; CHECK: # BB#1:
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; CHECK: # BB#2:
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%cmp = fcmp une float %f, 0.000000e+00
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br i1 %cmp, label %if.then, label %if.end
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@ -26,7 +26,7 @@ entry:
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lpad: ; preds = %entry
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; CHECK-EL: # %lpad
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; CHECK-EL: lw $gp
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; CHECK-EL: beq $5
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; CHECK-EL: bne $5
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%exn.val = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0
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catch i8* bitcast (i8** @_ZTId to i8*)
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@ -45,7 +45,7 @@ if.end: ; preds = %if.else, %if.then
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define void @func2(float %f2, float %f3) nounwind {
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entry:
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; CHECK: c.ole.s
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; CHECK: bc1f
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; CHECK: bc1t
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%cmp = fcmp ugt float %f2, %f3
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br i1 %cmp, label %if.else, label %if.then
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@ -102,7 +102,7 @@ if.end: ; preds = %if.else, %if.then
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define void @func5(double %f2, double %f3) nounwind {
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entry:
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; CHECK: c.ole.d
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; CHECK: bc1f
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; CHECK: bc1t
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%cmp = fcmp ugt double %f2, %f3
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br i1 %cmp, label %if.else, label %if.then
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@ -58,8 +58,8 @@ define i32 @f4(i32 %a, i32 %b, i32* %v) {
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entry:
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; CHECK: f4:
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; CHECK: blo LBB
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%tmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
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br i1 %tmp, label %return, label %cond_true
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%tmp = icmp uge i32 %a, %b ; <i1> [#uses=1]
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br i1 %tmp, label %cond_true, label %return
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cond_true: ; preds = %entry
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fence seq_cst
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@ -29,13 +29,13 @@ declare i32 @bar(...)
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define fastcc i32 @CountTree(%struct.quad_struct* %tree) {
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entry:
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; CHECK: CountTree:
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; CHECK: it eq
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; CHECK: cmpeq
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; CHECK: bne
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; CHECK: cmp
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; CHECK: itt eq
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; CHECK: moveq
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; CHECK: popeq
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; CHECK: bne
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; CHECK: cmp
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; CHECK: it eq
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; CHECK: cmpeq
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br label %tailrecurse
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tailrecurse: ; preds = %bb, %entry
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@ -83,7 +83,7 @@ define fastcc void @t2() nounwind {
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entry:
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; CHECK: t2:
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; CHECK: cmp r0, #0
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; CHECK: beq
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; CHECK: bne
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br i1 undef, label %bb.i.i3, label %growMapping.exit
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bb.i.i3: ; preds = %entry
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@ -3,11 +3,19 @@
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; Do not use tbb / tbh if any destination is before the jumptable.
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; rdar://7102917
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define i16 @main__getopt_internal_2E_exit_2E_ce(i32) nounwind {
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define i16 @main__getopt_internal_2E_exit_2E_ce(i32, i1 %b) nounwind {
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entry:
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br i1 %b, label %codeRepl127.exitStub, label %newFuncRoot
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newFuncRoot:
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br label %_getopt_internal.exit.ce
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codeRepl127.exitStub: ; preds = %_getopt_internal.exit.ce
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; Add an explicit edge back to before the jump table to ensure this block
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; is placed first.
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br i1 %b, label %newFuncRoot, label %codeRepl127.exitStub.exit
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codeRepl127.exitStub.exit:
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ret i16 0
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parse_options.exit.loopexit.exitStub: ; preds = %_getopt_internal.exit.ce
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@ -6,8 +6,8 @@
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define i32 @test(i32 %argc, i8** %argv) nounwind {
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entry:
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; CHECK: cmpl $2
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; CHECK-NEXT: je
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; CHECK-NEXT: %entry
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; CHECK-NEXT: jne
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; CHECK-NEXT: %bb2
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switch i32 %argc, label %UnifiedReturnBlock [
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i32 1, label %bb
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@ -1,4 +1,4 @@
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; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jnp
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; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jp
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; rdar://5902801
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declare void @test2()
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@ -17,7 +17,7 @@ entry:
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; CHECK: andl $150
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; CHECK-NEXT: testb
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; CHECK-NEXT: jg
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; CHECK-NEXT: jle
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entry.if.end_crit_edge: ; preds = %entry
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%tmp4.pre = load i32* @g_38 ; <i32> [#uses=1]
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@ -1,4 +1,4 @@
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; RUN: llc -mtriple=i686-linux -enable-block-placement < %s | FileCheck %s
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; RUN: llc -mtriple=i686-linux < %s | FileCheck %s
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declare void @error(i32 %i, i32 %a, i32 %b)
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@ -1,7 +1,7 @@
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; RUN: llc -march=x86-64 < %s | FileCheck %s
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; CHECK: orq
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; CHECK-NEXT: jne
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; CHECK-NEXT: je
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@_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE = external constant [33 x i16], align 32 ; <[33 x i16]*> [#uses=1]
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@_ZN11xercesc_2_56XMLUni16fgNotationStringE = external constant [9 x i16], align 16 ; <[9 x i16]*> [#uses=1]
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@ -7,8 +7,8 @@ define i32 @decode_byte(%struct.decode_t* %decode) nounwind {
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; CHECK: decode_byte:
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; CHECK: pushl
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; CHECK: popl
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; CHECK: popl
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; CHECK: jmp
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; CHECK: popl
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entry:
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%tmp2 = getelementptr %struct.decode_t* %decode, i32 0, i32 4 ; <i16*> [#uses=1]
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%tmp23 = bitcast i16* %tmp2 to i32* ; <i32*> [#uses=1]
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@ -1,7 +1,7 @@
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; RUN: llc -asm-verbose=false < %s | FileCheck %s
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; RUN: llc -asm-verbose=true < %s | FileCheck %s
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; MachineLICM should check dominance before hoisting instructions.
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; CHECK: jne LBB0_3
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; CHECK: ## in Loop:
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; CHECK-NEXT: xorb %al, %al
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; CHECK-NEXT: testb %al, %al
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@ -41,6 +41,7 @@ done:
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; CHECK-NEXT: align
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; CHECK-NEXT: .LBB1_4:
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; CHECK-NEXT: callq bar99
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; CHECK-NEXT: align
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; CHECK-NEXT: .LBB1_1:
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; CHECK-NEXT: callq body
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@ -75,19 +76,21 @@ exit:
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; CHECK: yet_more_involved:
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; CHECK: jmp .LBB2_1
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; CHECK-NEXT: align
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; CHECK-NEXT: .LBB2_4:
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; CHECK-NEXT: callq bar99
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; CHECK-NEXT: .LBB2_5:
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; CHECK-NEXT: callq block_a_true_func
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; CHECK-NEXT: callq block_a_merge_func
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; CHECK-NEXT: align
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; CHECK-NEXT: .LBB2_1:
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; CHECK-NEXT: callq body
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;
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; LBB2_4
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; CHECK: callq bar99
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; CHECK-NEXT: callq get
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; CHECK-NEXT: cmpl $2999, %eax
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; CHECK-NEXT: jle .LBB2_5
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; CHECK-NEXT: callq block_a_false_func
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; CHECK-NEXT: callq block_a_merge_func
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; CHECK-NEXT: jmp .LBB2_1
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; CHECK-NEXT: .LBB2_5:
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; CHECK-NEXT: callq block_a_true_func
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; CHECK-NEXT: callq block_a_merge_func
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; CHECK-NEXT: .LBB2_1:
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; CHECK-NEXT: callq body
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define void @yet_more_involved() nounwind {
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entry:
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@ -136,17 +139,22 @@ exit:
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; CHECK-NEXT: align
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; CHECK-NEXT: .LBB3_7:
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; CHECK-NEXT: callq bar100
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; CHECK-NEXT: jmp .LBB3_1
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; CHECK-NEXT: .LBB3_8:
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; CHECK-NEXT: callq bar101
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; CHECK-NEXT: jmp .LBB3_1
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; CHECK-NEXT: .LBB3_9:
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; CHECK-NEXT: callq bar102
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; CHECK-NEXT: jmp .LBB3_1
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; CHECK-NEXT: .LBB3_5:
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; CHECK-NEXT: callq loop_latch
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; CHECK-NEXT: align
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; CHECK-NEXT: .LBB3_1:
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; CHECK-NEXT: callq loop_header
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; CHECK: jl .LBB3_7
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; CHECK: jge .LBB3_3
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; CHECK-NEXT: callq bar101
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; CHECK-NEXT: jmp .LBB3_1
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; CHECK-NEXT: .LBB3_3:
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; CHECK: jge .LBB3_4
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; CHECK-NEXT: callq bar102
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; CHECK-NEXT: jmp .LBB3_1
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; CHECK-NEXT: .LBB3_4:
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; CHECK: jl .LBB3_6
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; CHECK-NEXT: callq loop_latch
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; CHECK-NEXT: jmp .LBB3_1
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; CHECK-NEXT: .LBB3_6:
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|
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define void @cfg_islands() nounwind {
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entry:
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|
|
|
@ -5,11 +5,11 @@
|
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define i32 @t1(i32 %a, i32 %b) nounwind {
|
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entry:
|
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; CHECK: t1:
|
||||
; CHECK: jne
|
||||
; CHECK: je [[LABEL:.*BB.*]]
|
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%cmp1 = icmp eq i32 %b, 0
|
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br i1 %cmp1, label %while.end, label %while.body
|
||||
|
||||
; CHECK: BB
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; CHECK: [[LABEL]]:
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; CHECK-NOT: mov
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; CHECK: ret
|
||||
|
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|
|
|
@ -70,8 +70,8 @@ bb26.preheader: ; preds = %imix_test.exit
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bb23: ; preds = %imix_test.exit
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unreachable
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; Verify that there are no loads inside the loop.
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; X86-32: %bb26.preheader
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; X86-32: .align 4
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; X86-32: %bb28
|
||||
; X86-32-NOT: (%esp),
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; X86-32-NOT: (%ebp),
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; X86-32: jmp
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||||
|
|
|
@ -18,11 +18,12 @@ forcond.preheader: ; preds = %entry
|
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; CHECK-NOT: xorl
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; CHECK-NOT: movl
|
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; CHECK-NOT: LBB
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; CHECK: jne
|
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; CHECK: je
|
||||
|
||||
; There should be no moves required in the for loop body.
|
||||
; CHECK: %forbody
|
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; CHECK-NOT: mov
|
||||
; CHECK: jbe
|
||||
|
||||
ifthen: ; preds = %entry
|
||||
ret i32 0
|
||||
|
|
|
@ -75,9 +75,9 @@ define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind {
|
|||
; Verify that the fmul gets sunk into the one part of the diamond where it is
|
||||
; needed.
|
||||
; CHECK: test6:
|
||||
; CHECK: jne
|
||||
; CHECK: mulps
|
||||
; CHECK: je
|
||||
; CHECK: ret
|
||||
; CHECK: mulps
|
||||
; CHECK: ret
|
||||
}
|
||||
|
||||
|
|
|
@ -147,7 +147,7 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp {
|
|||
|
||||
; 32: t11:
|
||||
; 32-NOT: subl ${{[0-9]+}}, %esp
|
||||
; 32: jne
|
||||
; 32: je
|
||||
; 32-NOT: movl
|
||||
; 32-NOT: addl ${{[0-9]+}}, %esp
|
||||
; 32: jmp {{_?}}foo5
|
||||
|
|
|
@ -7,8 +7,9 @@
|
|||
|
||||
; CHECK: foo:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: je
|
||||
; CHECK-NEXT: jne
|
||||
; CHECK-NEXT: divsd
|
||||
; CHECK-NEXT: movaps
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK: divsd
|
||||
|
||||
|
@ -25,10 +26,10 @@ define double @foo(double %x, double %y, i1 %c) nounwind {
|
|||
|
||||
; CHECK: split:
|
||||
; CHECK-NEXT: testb $1, %dil
|
||||
; CHECK-NEXT: je
|
||||
; CHECK-NEXT: divsd
|
||||
; CHECK-NEXT: jne
|
||||
; CHECK-NEXT: movaps
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK: movaps
|
||||
; CHECK: divsd
|
||||
; CHECK-NEXT: ret
|
||||
define double @split(double %x, double %y, i1 %c) nounwind {
|
||||
%a = fdiv double %x, 3.2
|
||||
|
|
|
@ -19,7 +19,7 @@ overflow:
|
|||
ret i1 false
|
||||
; CHECK: test1:
|
||||
; CHECK: imull
|
||||
; CHECK-NEXT: jo
|
||||
; CHECK-NEXT: jno
|
||||
}
|
||||
|
||||
define i1 @test2(i32 %v1, i32 %v2) nounwind {
|
||||
|
|
|
@ -20,7 +20,7 @@ overflow:
|
|||
|
||||
; CHECK: func1:
|
||||
; CHECK: subl 20(%esp)
|
||||
; CHECK-NEXT: jo
|
||||
; CHECK-NEXT: jno
|
||||
}
|
||||
|
||||
define i1 @func2(i32 %v1, i32 %v2) nounwind {
|
||||
|
@ -40,7 +40,7 @@ carry:
|
|||
|
||||
; CHECK: func2:
|
||||
; CHECK: subl 20(%esp)
|
||||
; CHECK-NEXT: jb
|
||||
; CHECK-NEXT: jae
|
||||
}
|
||||
|
||||
declare i32 @printf(i8*, ...) nounwind
|
||||
|
|
|
@ -5,11 +5,11 @@
|
|||
|
||||
; CHECK: movabsq $2305843009482129440, %r
|
||||
; CHECK-NEXT: btq %rax, %r
|
||||
; CHECK-NEXT: jb
|
||||
; CHECK-NEXT: movl $671088640, %e
|
||||
; CHECK-NEXT: jae
|
||||
; CHECK: movl $671088640, %e
|
||||
; CHECK-NEXT: btq %rax, %r
|
||||
; CHECK-NEXT: jb
|
||||
; CHECK-NEXT: testq %rax, %r
|
||||
; CHECK-NEXT: jae
|
||||
; CHECK: testq %rax, %r
|
||||
; CHECK-NEXT: j
|
||||
|
||||
define void @test(i8* %l) nounwind {
|
||||
|
@ -60,7 +60,7 @@ define void @test2(i32 %x) nounwind ssp {
|
|||
; CHECK-NEXT: movl $91
|
||||
; CHECK-NOT: movl
|
||||
; CHECK-NEXT: btl
|
||||
; CHECK-NEXT: jb
|
||||
; CHECK-NEXT: jae
|
||||
entry:
|
||||
switch i32 %x, label %if.end [
|
||||
i32 6, label %if.then
|
||||
|
@ -85,7 +85,7 @@ define void @test3(i32 %x) nounwind {
|
|||
; CHECK: cmpl $5
|
||||
; CHECK: ja
|
||||
; CHECK: cmpl $4
|
||||
; CHECK: jne
|
||||
; CHECK: je
|
||||
switch i32 %x, label %if.end [
|
||||
i32 0, label %if.then
|
||||
i32 1, label %if.then
|
||||
|
|
|
@ -113,15 +113,16 @@ altret:
|
|||
; CHECK-NEXT: jbe .LBB2_3
|
||||
; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}}
|
||||
; CHECK-NEXT: ja .LBB2_4
|
||||
; CHECK-NEXT: .LBB2_2:
|
||||
; CHECK-NEXT: movb $1, %al
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: jmp .LBB2_2
|
||||
; CHECK-NEXT: .LBB2_3:
|
||||
; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}}
|
||||
; CHECK-NEXT: jbe .LBB2_2
|
||||
; CHECK-NEXT: .LBB2_4:
|
||||
; CHECK-NEXT: xorb %al, %al
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK-NEXT: .LBB2_2:
|
||||
; CHECK-NEXT: movb $1, %al
|
||||
; CHECK-NEXT: ret
|
||||
|
||||
define i1 @dont_merge_oddly(float* %result) nounwind {
|
||||
entry:
|
||||
|
@ -336,10 +337,10 @@ return:
|
|||
|
||||
; CHECK: two:
|
||||
; CHECK-NOT: XYZ
|
||||
; CHECK: ret
|
||||
; CHECK: movl $0, XYZ(%rip)
|
||||
; CHECK: movl $1, XYZ(%rip)
|
||||
; CHECK-NOT: XYZ
|
||||
; CHECK: ret
|
||||
|
||||
define void @two() nounwind optsize {
|
||||
entry:
|
||||
|
|
|
@ -7,13 +7,14 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
|
|||
target triple = "x86_64-apple-darwin10.0.0"
|
||||
|
||||
; CHECK: testq %rdi, %rdi
|
||||
; CHECK-NEXT: jns LBB0_2
|
||||
; CHECK-NEXT: js LBB0_1
|
||||
; CHECK: cvtsi2ss
|
||||
; CHECK-NEXT: ret
|
||||
; CHECK: LBB0_1
|
||||
; CHECK: shrq
|
||||
; CHECK-NEXT: andq
|
||||
; CHECK-NEXT: orq
|
||||
; CHECK-NEXT: cvtsi2ss
|
||||
; CHECK: LBB0_2
|
||||
; CHECK-NEXT: cvtsi2ss
|
||||
define float @test(i64 %a) {
|
||||
entry:
|
||||
%b = uitofp i64 %a to float
|
||||
|
|
|
@ -9,13 +9,13 @@ entry:
|
|||
; X32-NOT: andb
|
||||
; X32-NOT: shrb
|
||||
; X32: testb $64
|
||||
; X32: jne
|
||||
; X32: je
|
||||
|
||||
; X64: t:
|
||||
; X64-NOT: setne
|
||||
; X64: xorl
|
||||
; X64: testb $64
|
||||
; X64: jne
|
||||
; X64: je
|
||||
%0 = and i32 %a, 16384
|
||||
%1 = icmp ne i32 %0, 0
|
||||
%2 = and i32 %b, 16384
|
||||
|
@ -43,7 +43,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp {
|
|||
; X32: cmpl
|
||||
; X32: sete
|
||||
; X32-NOT: xor
|
||||
; X32: jne
|
||||
; X32: je
|
||||
|
||||
; X64: t2:
|
||||
; X64: testl
|
||||
|
@ -51,7 +51,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp {
|
|||
; X64: testl
|
||||
; X64: sete
|
||||
; X64-NOT: xor
|
||||
; X64: jne
|
||||
; X64: je
|
||||
entry:
|
||||
%0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
|
||||
%1 = icmp eq i32 %y, 0 ; <i1> [#uses=1]
|
||||
|
|
|
@ -30,7 +30,7 @@ not_less:
|
|||
}
|
||||
; CHECK: f1:
|
||||
; CHECK-NEXT: ashr r0, r0, 32
|
||||
; CHECK-NEXT: bf r0
|
||||
; CHECK-NEXT: bt r0
|
||||
|
||||
define i32 @f2(i32 %a) {
|
||||
%1 = icmp sge i32 %a, 0
|
||||
|
@ -51,9 +51,9 @@ define i32 @f3(i32 %a) {
|
|||
}
|
||||
; CHECK: f3:
|
||||
; CHECK-NEXT: ashr r0, r0, 32
|
||||
; CHECK-NEXT: bf r0
|
||||
; CHECK-NEXT: ldc r0, 10
|
||||
; CHECK: ldc r0, 17
|
||||
; CHECK-NEXT: bt r0
|
||||
; CHECK-NEXT: ldc r0, 17
|
||||
; CHECK: ldc r0, 10
|
||||
|
||||
define i32 @f4(i32 %a) {
|
||||
%1 = icmp sge i32 %a, 0
|
||||
|
@ -62,9 +62,9 @@ define i32 @f4(i32 %a) {
|
|||
}
|
||||
; CHECK: f4:
|
||||
; CHECK-NEXT: ashr r0, r0, 32
|
||||
; CHECK-NEXT: bf r0
|
||||
; CHECK-NEXT: ldc r0, 17
|
||||
; CHECK: ldc r0, 10
|
||||
; CHECK-NEXT: bt r0
|
||||
; CHECK-NEXT: ldc r0, 10
|
||||
; CHECK: ldc r0, 17
|
||||
|
||||
define i32 @f5(i32 %a) {
|
||||
%1 = icmp sge i32 %a, 0
|
||||
|
|
|
@ -61,7 +61,7 @@ exit: ; preds = %cond.true29.i, %cond.true.i
|
|||
; CHECK: @test2
|
||||
; CHECK: %entry
|
||||
; CHECK-NOT: mov
|
||||
; CHECK: jne
|
||||
; CHECK: je
|
||||
define void @test2(i32 %n) nounwind uwtable {
|
||||
entry:
|
||||
br i1 undef, label %while.end, label %for.cond468
|
||||
|
|
Loading…
Reference in New Issue