From 418c8e69bb20311c9e594c31e8d05e4dccddb758 Mon Sep 17 00:00:00 2001
From: Rafael Espindola <rafael.espindola@gmail.com>
Date: Tue, 17 Oct 2006 13:36:07 +0000
Subject: [PATCH] add FSTD and FSTS

llvm-svn: 30996
---
 llvm/lib/Target/ARM/ARMInstrInfo.td    | 13 +++++++++++--
 llvm/lib/Target/ARM/README.txt         |  2 +-
 llvm/test/Regression/CodeGen/ARM/fp.ll | 18 ++++++++++++++++--
 3 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index e427050440a0..ff9d9e7a0367 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -286,13 +286,22 @@ def FDIVD   : DFPBinOp<"fdivd", fdiv>;
 
 // Floating Point Load
 def FLDS  : InstARM<(ops FPRegs:$dst, IntRegs:$addr),
-                     "flds $dst, $addr",
+                     "flds $dst, [$addr]",
                      [(set FPRegs:$dst, (load IntRegs:$addr))]>;
 
 def FLDD  : InstARM<(ops DFPRegs:$dst, IntRegs:$addr),
-                     "fldd $dst, $addr",
+                     "fldd $dst, [$addr]",
                      [(set DFPRegs:$dst, (load IntRegs:$addr))]>;
 
+// Floating Point Store
+def FSTS    : InstARM<(ops FPRegs:$src, IntRegs:$addr),
+                       "fsts $src, [$addr]",
+                       [(store FPRegs:$src, IntRegs:$addr)]>;
+
+def FSTD    : InstARM<(ops DFPRegs:$src, IntRegs:$addr),
+                       "fstd $src, [$addr]",
+                       [(store DFPRegs:$src, IntRegs:$addr)]>;
+
 def : Pat<(ARMcall tglobaladdr:$dst),
           (bl tglobaladdr:$dst)>;
 
diff --git a/llvm/lib/Target/ARM/README.txt b/llvm/lib/Target/ARM/README.txt
index 9e846565c83f..3f0e4f951d6f 100644
--- a/llvm/lib/Target/ARM/README.txt
+++ b/llvm/lib/Target/ARM/README.txt
@@ -29,7 +29,7 @@ add r0, r1, r0
 
 ----------------------------------------------------------
 
-add an offset to FLDS/FLDD addressing mode
+add an offset to FLDS/FLDD/FSTD/FSTS addressing mode
 
 ----------------------------------------------------------
 
diff --git a/llvm/test/Regression/CodeGen/ARM/fp.ll b/llvm/test/Regression/CodeGen/ARM/fp.ll
index 512f1dc15ca4..510adc3ebf81 100644
--- a/llvm/test/Regression/CodeGen/ARM/fp.ll
+++ b/llvm/test/Regression/CodeGen/ARM/fp.ll
@@ -1,12 +1,14 @@
 ; RUN: llvm-as < %s | llc -march=arm &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmsr  | wc -l | grep 4 &&
+; RUN: llvm-as < %s | llc -march=arm | grep fmsr  | wc -l | grep 5 &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fsitos &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fmrs &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fsitod &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fmrrd | wc -l | grep 5 &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmdrr | wc -l | grep 2 &&
+; RUN: llvm-as < %s | llc -march=arm | grep fmdrr | wc -l | grep 3 &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fldd &&
 ; RUN: llvm-as < %s | llc -march=arm | grep flds &&
+; RUN: llvm-as < %s | llc -march=arm | grep fstd &&
+; RUN: llvm-as < %s | llc -march=arm | grep fsts &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fuitod &&
 ; RUN: llvm-as < %s | llc -march=arm | grep fuitos &&
 ; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216"
@@ -60,3 +62,15 @@ entry:
 
 declare void %f4(double)
 declare double %f5()
+
+void %f6(float %a, float* %b) {
+entry:
+	store float %a, float* %b
+	ret void
+}
+
+void %f7(double %a, double* %b) {
+entry:
+	store double %a, double* %b
+	ret void
+}