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Fix up patterns for VCVTSS2SD. Specifically give it priority over SSE form. Add an OptForSpeed to explicitly pair up with an OptForSize that was already on another pattern. 

llvm-svn: 160939
This commit is contained in:
Craig Topper 2012-07-30 01:38:57 +00:00
parent 28402efcb6
commit 415b3586d0
1 changed files with 10 additions and 9 deletions
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19
llvm/lib/Target/X86/X86InstrSSE.td
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@ -1709,18 +1709,19 @@ def VCVTSS2SDrm : I<0x5A, MRMSrcMem, (outs FR64:$dst),
XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>; XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>;
} }
let Predicates = [HasAVX] in { let AddedComplexity = 1 in { // give AVX priority
def : Pat<(f64 (fextend FR32:$src)), def : Pat<(f64 (fextend FR32:$src)),
(VCVTSS2SDrr FR32:$src, FR32:$src)>; (VCVTSS2SDrr FR32:$src, FR32:$src)>, Requires<[HasAVX]>;
def : Pat<(fextend (loadf32 addr:$src)), def : Pat<(fextend (loadf32 addr:$src)),
(VCVTSS2SDrm (f32 (IMPLICIT_DEF)), addr:$src)>; (VCVTSS2SDrm (f32 (IMPLICIT_DEF)), addr:$src)>, Requires<[HasAVX]>;
def : Pat<(extloadf32 addr:$src),
(VCVTSS2SDrm (f32 (IMPLICIT_DEF)), addr:$src)>;
}
def : Pat<(extloadf32 addr:$src), def : Pat<(extloadf32 addr:$src),
(VCVTSS2SDrr (f32 (IMPLICIT_DEF)), (MOVSSrm addr:$src))>, (VCVTSS2SDrm (f32 (IMPLICIT_DEF)), addr:$src)>,
Requires<[HasAVX, OptForSpeed]>; Requires<[HasAVX, OptForSize]>;
def : Pat<(extloadf32 addr:$src),
(VCVTSS2SDrr (f32 (IMPLICIT_DEF)), (VMOVSSrm addr:$src))>,
Requires<[HasAVX, OptForSpeed]>;
} // AddedComplexity = 1
def CVTSS2SDrr : I<0x5A, MRMSrcReg, (outs FR64:$dst), (ins FR32:$src), def CVTSS2SDrr : I<0x5A, MRMSrcReg, (outs FR64:$dst), (ins FR32:$src),
"cvtss2sd\t{$src, $dst|$dst, $src}", "cvtss2sd\t{$src, $dst|$dst, $src}",