forked from OSchip/llvm-project
Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
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@ -16,6 +16,8 @@
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#define LLVM_TARGET_TARGETOPTIONS_H
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namespace llvm {
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class MachineFunction;
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// Possible float ABI settings. Used with FloatABIType in TargetOptions.h.
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namespace FloatABI {
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enum ABIType {
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@ -35,6 +37,16 @@ namespace llvm {
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/// elimination optimization, this option should disable it.
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extern bool NoFramePointerElim;
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/// NoFramePointerElimNonLeaf - This flag is enabled when the
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/// -disable-non-leaf-fp-elim is specified on the command line. If the target
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/// supports the frame pointer elimination optimization, this option should
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/// disable it for non-leaf functions.
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extern bool NoFramePointerElimNonLeaf;
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/// DisableFramePointerElim - This returns true if frame pointer elimination
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/// optimization should be disabled for the given machine function.
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extern bool DisableFramePointerElim(const MachineFunction &MF);
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/// LessPreciseFPMAD - This flag is enabled when the
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/// -enable-fp-mad is specified on the command line. When this flag is off
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/// (the default), the code generator is not allowed to generate mad
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@ -1251,7 +1251,7 @@ DIE *DwarfDebug::createSubprogramDIE(const DISubprogram &SP, bool MakeDecl) {
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// DW_TAG_inlined_subroutine may refer to this DIE.
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ModuleCU->insertDIE(SP.getNode(), SPDie);
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if (NoFramePointerElim == false)
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if (!DisableFramePointerElim(*Asm->MF))
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addUInt(SPDie, dwarf::DW_AT_APPLE_omit_frame_ptr, dwarf::DW_FORM_flag, 1);
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return SPDie;
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@ -481,7 +481,7 @@ ARMBaseRegisterInfo::UpdateRegAllocHint(unsigned Reg, unsigned NewReg,
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///
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bool ARMBaseRegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return ((NoFramePointerElim && MFI->hasCalls())||
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return ((DisableFramePointerElim(MF) && MFI->hasCalls())||
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needsStackRealignment(MF) ||
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MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken());
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@ -509,7 +509,7 @@ needsStackRealignment(const MachineFunction &MF) const {
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bool ARMBaseRegisterInfo::
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cannotEliminateFrame(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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if (NoFramePointerElim && MFI->hasCalls())
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if (DisableFramePointerElim(MF) && MFI->hasCalls())
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return true;
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return MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken()
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|| needsStackRealignment(MF);
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@ -110,7 +110,8 @@ BlackfinRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const {
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// if frame pointer elimination is disabled.
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bool BlackfinRegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasCalls() || MFI->hasVarSizedObjects();
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return DisableFramePointerElim(MF) ||
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MFI->hasCalls() || MFI->hasVarSizedObjects();
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}
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bool BlackfinRegisterInfo::
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@ -303,7 +303,7 @@ BitVector SPURegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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//
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static bool needsFP(const MachineFunction &MF) {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects();
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return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
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}
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//--------------------------------------------------------------------------
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@ -243,7 +243,7 @@ void MBlazeRegisterInfo::adjustMBlazeStackFrame(MachineFunction &MF) const {
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// if frame pointer elimination is disabled.
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bool MBlazeRegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects();
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return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
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}
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// This function eliminate ADJCALLSTACKDOWN,
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@ -138,7 +138,7 @@ MSP430RegisterInfo::getPointerRegClass(unsigned Kind) const {
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bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return (NoFramePointerElim ||
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return (DisableFramePointerElim(MF) ||
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MF.getFrameInfo()->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken());
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}
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@ -338,7 +338,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const
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bool MipsRegisterInfo::
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hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects();
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return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
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}
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// This function eliminate ADJCALLSTACKDOWN,
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@ -5531,7 +5531,7 @@ SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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bool is31 = (NoFramePointerElim || MFI->hasVarSizedObjects())
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bool is31 = (DisableFramePointerElim(MF) || MFI->hasVarSizedObjects())
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&& MFI->getStackSize();
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if (isPPC64)
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@ -409,7 +409,7 @@ PPCRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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//
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static bool needsFP(const MachineFunction &MF) {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects() ||
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return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects() ||
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(GuaranteedTailCallOpt && MF.getInfo<PPCFunctionInfo>()->hasFastCall());
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}
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@ -77,7 +77,7 @@ BitVector SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const
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/// allocas or if frame pointer elimination is disabled.
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bool SystemZRegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return NoFramePointerElim || MFI->hasVarSizedObjects();
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return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
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}
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void SystemZRegisterInfo::
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@ -11,6 +11,8 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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@ -25,6 +27,7 @@ namespace llvm {
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bool LessPreciseFPMADOption;
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bool PrintMachineCode;
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bool NoFramePointerElim;
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bool NoFramePointerElimNonLeaf;
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bool NoExcessFPPrecision;
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bool UnsafeFPMath;
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bool FiniteOnlyFPMathOption;
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@ -58,6 +61,11 @@ DisableFPElim("disable-fp-elim",
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cl::location(NoFramePointerElim),
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cl::init(false));
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static cl::opt<bool, true>
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DisableFPElimNonLeaf("disable-non-leaf-fp-elim",
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cl::desc("Disable frame pointer elimination optimization for non-leaf funcs"),
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cl::location(NoFramePointerElimNonLeaf),
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cl::init(false));
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static cl::opt<bool, true>
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DisableExcessPrecision("disable-excess-fp-precision",
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cl::desc("Disable optimizations that may increase FP precision"),
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cl::location(NoExcessFPPrecision),
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@ -268,6 +276,18 @@ void TargetMachine::setDataSections(bool V) {
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}
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namespace llvm {
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/// DisableFramePointerElim - This returns true if frame pointer elimination
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/// optimization should be disabled for the given machine function.
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bool DisableFramePointerElim(const MachineFunction &MF) {
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if (NoFramePointerElim)
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return true;
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if (NoFramePointerElimNonLeaf) {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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return MFI->hasCalls();
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}
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return false;
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}
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/// LessPreciseFPMAD - This flag return true when -enable-fp-mad option
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/// is specified on the command line. When this flag is off(default), the
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/// code generator is not allowed to generate mad (multiply add) if the
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@ -439,7 +439,7 @@ bool X86RegisterInfo::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const MachineModuleInfo &MMI = MF.getMMI();
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return (NoFramePointerElim ||
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return (DisableFramePointerElim(MF) ||
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needsStackRealignment(MF) ||
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MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken() ||
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@ -113,7 +113,7 @@ XCoreRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
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}
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bool XCoreRegisterInfo::hasFP(const MachineFunction &MF) const {
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return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
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return DisableFramePointerElim(MF) || MF.getFrameInfo()->hasVarSizedObjects();
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}
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// This function eliminates ADJCALLSTACKDOWN,
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@ -0,0 +1,44 @@
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; RUN: llc < %s -march=x86 -asm-verbose=false | FileCheck %s -check-prefix=FP-ELIM
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; RUN: llc < %s -march=x86 -asm-verbose=false -disable-fp-elim | FileCheck %s -check-prefix=NO-ELIM
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; RUN: llc < %s -march=x86 -asm-verbose=false -disable-non-leaf-fp-elim | FileCheck %s -check-prefix=NON-LEAF
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; Implement -momit-leaf-frame-pointer
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; rdar://7886181
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define i32 @t1() nounwind readnone {
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entry:
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; FP-ELIM: t1:
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; FP-ELIM-NEXT: movl
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; FP-ELIM-NEXT: ret
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; NO-ELIM: t1:
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; NO-ELIM-NEXT: pushl %ebp
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; NO-ELIM: popl %ebp
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; NO-ELIM-NEXT: ret
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; NON-LEAF: t1:
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; NON-LEAF-NEXT: movl
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; NON-LEAF-NEXT: ret
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ret i32 10
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}
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define void @t2() nounwind {
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entry:
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; FP-ELIM: t2:
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; FP-ELIM-NOT: pushl %ebp
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; FP-ELIM: ret
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; NO-ELIM: t2:
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; NO-ELIM-NEXT: pushl %ebp
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; NO-ELIM: popl %ebp
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; NO-ELIM-NEXT: ret
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; NON-LEAF: t2:
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; NON-LEAF-NEXT: pushl %ebp
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; NON-LEAF: popl %ebp
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; NON-LEAF-NEXT: ret
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tail call void @foo(i32 0) nounwind
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ret void
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}
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declare void @foo(i32)
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