From 40f5dd27f0d107d63bcb4be37237b378ed7a2451 Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Sat, 7 Oct 2006 13:46:42 +0000 Subject: [PATCH] implement fadds, faddd, fmuls and fmuld llvm-svn: 30801 --- llvm/lib/Target/ARM/ARMInstrInfo.td | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index cbdc5b96286d..3aa4a53534aa 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -187,3 +187,21 @@ def FSITOS : InstARM<(ops FPRegs:$dst, FPRegs:$src), def FSITOD : InstARM<(ops DFPRegs:$dst, FPRegs:$src), "fsitod $dst, $src", [(set DFPRegs:$dst, (armfsitod FPRegs:$src))]>; + + +// Floating Point Arithmetic +def FADDS : InstARM<(ops FPRegs:$dst, FPRegs:$a, FPRegs:$b), + "fadds $dst, $a, $b", + [(set FPRegs:$dst, (fadd FPRegs:$a, FPRegs:$b))]>; + +def FADDD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b), + "faddd $dst, $a, $b", + [(set DFPRegs:$dst, (fadd DFPRegs:$a, DFPRegs:$b))]>; + +def FMULS : InstARM<(ops FPRegs:$dst, FPRegs:$a, FPRegs:$b), + "fmuls $dst, $a, $b", + [(set FPRegs:$dst, (fmul FPRegs:$a, FPRegs:$b))]>; + +def FMULD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b), + "fmuld $dst, $a, $b", + [(set DFPRegs:$dst, (fmul DFPRegs:$a, DFPRegs:$b))]>;