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[AArch64][GlobalISel] Fix incorrect codegen for <16 x s8> G_ASHR. 

Fixes PR49904
This commit is contained in:
Amara Emerson 2021-04-09 10:39:59 -07:00
parent 16fe741c69
commit 40e75cafc0
2 changed files with 3 additions and 3 deletions
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2
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
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@ -1796,7 +1796,7 @@ bool AArch64InstructionSelector::selectVectorAshrLshr(
NegOpc = AArch64::NEGv8i16;
} else if (Ty == LLT::vector(16, 8)) {
Opc = IsASHR ? AArch64::SSHLv16i8 : AArch64::USHLv16i8;
NegOpc = AArch64::NEGv8i16;
NegOpc = AArch64::NEGv16i8;
} else if (Ty == LLT::vector(8, 8)) {
Opc = IsASHR ? AArch64::SSHLv8i8 : AArch64::USHLv8i8;
NegOpc = AArch64::NEGv8i8;

4
llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
View File

@ -562,8 +562,8 @@ body: |
; CHECK: liveins: $q0, $q1
; CHECK: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
; CHECK: [[NEGv8i16_:%[0-9]+]]:fpr128 = NEGv8i16 [[COPY1]]
; CHECK: [[USHLv16i8_:%[0-9]+]]:fpr128 = USHLv16i8 [[COPY]], [[NEGv8i16_]]
; CHECK: [[NEGv16i8_:%[0-9]+]]:fpr128 = NEGv16i8 [[COPY1]]
; CHECK: [[USHLv16i8_:%[0-9]+]]:fpr128 = USHLv16i8 [[COPY]], [[NEGv16i8_]]
; CHECK: $q0 = COPY [[USHLv16i8_]]
; CHECK: RET_ReallyLR implicit $q0
%0:fpr(<16 x s8>) = COPY $q0