[MLIR][GPU] Add debug output to enable dumping GPU assembly

- Set the DEBUG_TYPE of SerializeToBlob to serialize-to-blob
- Add debug output to print the assembly or PTX for GPU modules before
  they are assembled and linked

Note that, as SerializeToBlob is a superclass of SerializeToCubin and
SerializeToHsaco, --debug-only=serialize-to-blom will dump the
intermediate compiler result for both of these passes.

In addition, if LLVM options such as --stop-after are used to control
the GPU kernel compilation process, the debug output will contain the
appropriate intermediate IR.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D117519
This commit is contained in:
Krzysztof Drewniak 2022-01-10 23:53:58 +00:00
parent 118babe67a
commit 40aef79db0
3 changed files with 28 additions and 0 deletions

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@ -102,6 +102,13 @@ void registerGpuSerializeToCubinPass();
/// annotation. /// annotation.
void registerGpuSerializeToHsacoPass(); void registerGpuSerializeToHsacoPass();
/// Create an instance of the GPU kernel function to HSAco binary serialization
/// pass.
std::unique_ptr<Pass> createGpuSerializeToHsacoPass(StringRef triple,
StringRef arch,
StringRef features,
int optLevel);
/// Generate the code for registering passes. /// Generate the code for registering passes.
#define GEN_PASS_REGISTRATION #define GEN_PASS_REGISTRATION
#include "mlir/Dialect/GPU/Passes.h.inc" #include "mlir/Dialect/GPU/Passes.h.inc"

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@ -21,6 +21,10 @@
#include "llvm/Support/TargetSelect.h" #include "llvm/Support/TargetSelect.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
#include <string>
#define DEBUG_TYPE "serialize-to-blob"
using namespace mlir; using namespace mlir;
std::string gpu::getDefaultGpuBinaryAnnotation() { return "gpu.binary"; } std::string gpu::getDefaultGpuBinaryAnnotation() { return "gpu.binary"; }
@ -76,6 +80,12 @@ void gpu::SerializeToBlobPass::runOnOperation() {
std::string targetISA = std::move(maybeTargetISA.getValue()); std::string targetISA = std::move(maybeTargetISA.getValue());
LLVM_DEBUG({
llvm::dbgs() << "ISA for module: " << getOperation().getNameAttr() << "\n";
llvm::dbgs() << targetISA << "\n";
llvm::dbgs().flush();
});
// Serialize the target ISA. // Serialize the target ISA.
std::unique_ptr<std::vector<char>> blob = serializeISA(targetISA); std::unique_ptr<std::vector<char>> blob = serializeISA(targetISA);
if (!blob) if (!blob)

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@ -479,6 +479,17 @@ void mlir::registerGpuSerializeToHsacoPass() {
"", 2); "", 2);
}); });
} }
/// Create an instance of the GPU kernel function to HSAco binary serialization
/// pass.
std::unique_ptr<Pass> mlir::createGpuSerializeToHsacoPass(StringRef triple,
StringRef arch,
StringRef features,
int optLevel) {
return std::make_unique<SerializeToHsacoPass>(triple, arch, features,
optLevel);
}
#else // MLIR_GPU_TO_HSACO_PASS_ENABLE #else // MLIR_GPU_TO_HSACO_PASS_ENABLE
void mlir::registerGpuSerializeToHsacoPass() {} void mlir::registerGpuSerializeToHsacoPass() {}
#endif // MLIR_GPU_TO_HSACO_PASS_ENABLE #endif // MLIR_GPU_TO_HSACO_PASS_ENABLE