forked from OSchip/llvm-project
[lldb] [Process/NetBSD] Fix wrongly mapping mm* registers
Fix mistake that mapped mm* registers into the space for xmm* registers, rather than the one shared with st* registers. In other words, 'register read mmN' now correctly shows the mmN register rather than part of xmmN. Includes a minimal lit regression test. Differential Revision: https://reviews.llvm.org/D60325 llvm-svn: 358178
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#include <cstdint>
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struct alignas(16) xmm_t {
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uint64_t a, b;
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};
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int main() {
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uint64_t mm0 = 0x0102030405060708;
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uint64_t mm1 = 0x1112131415161718;
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uint64_t mm2 = 0x2122232425262728;
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uint64_t mm3 = 0x3132333435363738;
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uint64_t mm4 = 0x4142434445464748;
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uint64_t mm5 = 0x5152535455565758;
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uint64_t mm6 = 0x6162636465666768;
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uint64_t mm7 = 0x7172737475767778;
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xmm_t xmm0[2] = { 0x020406080A0C0E01, 0x030507090B0D0F00 };
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xmm_t xmm1[2] = { 0x121416181A1C1E11, 0x131517191B1D1F10 };
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xmm_t xmm2[2] = { 0x222426282A2C2E21, 0x232527292B2D2F20 };
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xmm_t xmm3[2] = { 0x323436383A3C3E31, 0x333537393B3D3F30 };
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xmm_t xmm4[2] = { 0x424446484A4C4E41, 0x434547494B4D4F40 };
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xmm_t xmm5[2] = { 0x525456585A5C5E51, 0x535557595B5D5F50 };
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xmm_t xmm6[2] = { 0x626466686A6C6E61, 0x636567696B6D6F60 };
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xmm_t xmm7[2] = { 0x727476787A7C7E71, 0x737577797B7D7F70 };
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asm volatile(
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"movq %0, %%mm0\n\t"
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"movq %1, %%mm1\n\t"
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"movq %2, %%mm2\n\t"
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"movq %3, %%mm3\n\t"
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"movq %4, %%mm4\n\t"
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"movq %5, %%mm5\n\t"
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"movq %6, %%mm6\n\t"
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"movq %7, %%mm7\n\t"
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"\n\t"
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"movaps %8, %%xmm0\n\t"
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"movaps %9, %%xmm1\n\t"
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"movaps %10, %%xmm2\n\t"
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"movaps %11, %%xmm3\n\t"
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"movaps %12, %%xmm4\n\t"
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"movaps %13, %%xmm5\n\t"
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"movaps %14, %%xmm6\n\t"
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"movaps %15, %%xmm7\n\t"
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"\n\t"
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"int3"
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:
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: "g"(mm0), "g"(mm1), "g"(mm2), "g"(mm3), "g"(mm4), "g"(mm5), "g"(mm6),
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"g"(mm7), "m"(xmm0), "m"(xmm1), "m"(xmm2), "m"(xmm3), "m"(xmm4),
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"m"(xmm5), "m"(xmm6), "m"(xmm7)
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: "%mm0", "%mm1", "%mm2", "%mm3", "%mm4", "%mm5", "%mm6", "%mm7",
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"%xmm0", "%xmm1", "%xmm2", "%xmm3", "%xmm4", "%xmm5", "%xmm6", "%xmm7"
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);
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return 0;
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}
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@ -0,0 +1,22 @@
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# REQUIRES: native && (target-x86 || target-x86_64)
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# RUN: %clang++ %p/Inputs/x86-mm-xmm-read.cpp -o %t
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# RUN: %lldb -b -s %s %t | FileCheck %s
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process launch
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register read --all
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# CHECK-DAG: mm0 = 0x0102030405060708
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# CHECK-DAG: mm1 = 0x1112131415161718
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# CHECK-DAG: mm2 = 0x2122232425262728
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# CHECK-DAG: mm3 = 0x3132333435363738
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# CHECK-DAG: mm4 = 0x4142434445464748
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# CHECK-DAG: mm5 = 0x5152535455565758
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# CHECK-DAG: mm6 = 0x6162636465666768
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# CHECK-DAG: mm7 = 0x7172737475767778
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# CHECK-DAG: xmm0 = {0x01 0x0e 0x0c 0x0a 0x08 0x06 0x04 0x02 0x00 0x0f 0x0d 0x0b 0x09 0x07 0x05 0x03}
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# CHECK-DAG: xmm1 = {0x11 0x1e 0x1c 0x1a 0x18 0x16 0x14 0x12 0x10 0x1f 0x1d 0x1b 0x19 0x17 0x15 0x13}
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# CHECK-DAG: xmm2 = {0x21 0x2e 0x2c 0x2a 0x28 0x26 0x24 0x22 0x20 0x2f 0x2d 0x2b 0x29 0x27 0x25 0x23}
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# CHECK-DAG: xmm3 = {0x31 0x3e 0x3c 0x3a 0x38 0x36 0x34 0x32 0x30 0x3f 0x3d 0x3b 0x39 0x37 0x35 0x33}
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# CHECK-DAG: xmm4 = {0x41 0x4e 0x4c 0x4a 0x48 0x46 0x44 0x42 0x40 0x4f 0x4d 0x4b 0x49 0x47 0x45 0x43}
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# CHECK-DAG: xmm5 = {0x51 0x5e 0x5c 0x5a 0x58 0x56 0x54 0x52 0x50 0x5f 0x5d 0x5b 0x59 0x57 0x55 0x53}
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# CHECK-DAG: xmm6 = {0x61 0x6e 0x6c 0x6a 0x68 0x66 0x64 0x62 0x60 0x6f 0x6d 0x6b 0x69 0x67 0x65 0x63}
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# CHECK-DAG: xmm7 = {0x71 0x7e 0x7c 0x7a 0x78 0x76 0x74 0x72 0x70 0x7f 0x7d 0x7b 0x79 0x77 0x75 0x73}
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@ -402,7 +402,7 @@ NativeRegisterContextNetBSD_x86_64::ReadRegister(const RegisterInfo *reg_info,
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case lldb_mm5_x86_64:
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case lldb_mm6_x86_64:
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case lldb_mm7_x86_64:
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reg_value.SetBytes(&m_fpr_x86_64.fxstate.fx_xmm[reg - lldb_mm0_x86_64],
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reg_value.SetBytes(&m_fpr_x86_64.fxstate.fx_87_ac[reg - lldb_mm0_x86_64],
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reg_info->byte_size, endian::InlHostByteOrder());
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break;
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case lldb_xmm0_x86_64:
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case lldb_mm5_x86_64:
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case lldb_mm6_x86_64:
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case lldb_mm7_x86_64:
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::memcpy(&m_fpr_x86_64.fxstate.fx_xmm[reg - lldb_mm0_x86_64],
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::memcpy(&m_fpr_x86_64.fxstate.fx_87_ac[reg - lldb_mm0_x86_64],
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reg_value.GetBytes(), reg_value.GetByteSize());
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break;
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case lldb_xmm0_x86_64:
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