forked from OSchip/llvm-project
[PowerPC] Add extended subtract mnemonics
This adds support for the extended subtract mnemonics to the asm parser: subi subis subic subic. sub sub. subc subc. llvm-svn: 184832
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parent
aaaf28971d
commit
4069e24bd3
llvm
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@ -432,6 +432,46 @@ ProcessInstruction(MCInst &Inst,
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Inst = TmpInst;
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Inst = TmpInst;
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break;
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break;
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}
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}
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case PPC::SUBI: {
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MCInst TmpInst;
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int64_t N = Inst.getOperand(2).getImm();
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TmpInst.setOpcode(PPC::ADDI);
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TmpInst.addOperand(Inst.getOperand(0));
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TmpInst.addOperand(Inst.getOperand(1));
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TmpInst.addOperand(MCOperand::CreateImm(-N));
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Inst = TmpInst;
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break;
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}
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case PPC::SUBIS: {
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MCInst TmpInst;
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int64_t N = Inst.getOperand(2).getImm();
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TmpInst.setOpcode(PPC::ADDIS);
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TmpInst.addOperand(Inst.getOperand(0));
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TmpInst.addOperand(Inst.getOperand(1));
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TmpInst.addOperand(MCOperand::CreateImm(-N));
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Inst = TmpInst;
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break;
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}
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case PPC::SUBIC: {
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MCInst TmpInst;
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int64_t N = Inst.getOperand(2).getImm();
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TmpInst.setOpcode(PPC::ADDIC);
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TmpInst.addOperand(Inst.getOperand(0));
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TmpInst.addOperand(Inst.getOperand(1));
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TmpInst.addOperand(MCOperand::CreateImm(-N));
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Inst = TmpInst;
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break;
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}
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case PPC::SUBICo: {
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MCInst TmpInst;
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int64_t N = Inst.getOperand(2).getImm();
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TmpInst.setOpcode(PPC::ADDICo);
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TmpInst.addOperand(Inst.getOperand(0));
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TmpInst.addOperand(Inst.getOperand(1));
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TmpInst.addOperand(MCOperand::CreateImm(-N));
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Inst = TmpInst;
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break;
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}
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case PPC::SLWI: {
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case PPC::SLWI: {
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MCInst TmpInst;
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MCInst TmpInst;
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int64_t N = Inst.getOperand(2).getImm();
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int64_t N = Inst.getOperand(2).getImm();
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@ -2276,6 +2276,20 @@ def : InstAlias<"not. $rA, $rB", (NOR8o g8rc:$rA, g8rc:$rB, g8rc:$rB)>;
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def LAx : PPCAsmPseudo<"la $rA, $addr", (ins gprc:$rA, memri:$addr)>;
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def LAx : PPCAsmPseudo<"la $rA, $addr", (ins gprc:$rA, memri:$addr)>;
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def SUBI : PPCAsmPseudo<"subi $rA, $rB, $imm",
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(ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
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def SUBIS : PPCAsmPseudo<"subis $rA, $rB, $imm",
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(ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
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def SUBIC : PPCAsmPseudo<"subic $rA, $rB, $imm",
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(ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
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def SUBICo : PPCAsmPseudo<"subic. $rA, $rB, $imm",
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(ins gprc:$rA, gprc:$rB, s16imm:$imm)>;
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def : InstAlias<"sub $rA, $rB, $rC", (SUBF8 g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
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def : InstAlias<"sub. $rA, $rB, $rC", (SUBF8o g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
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def : InstAlias<"subc $rA, $rB, $rC", (SUBFC8 g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
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def : InstAlias<"subc. $rA, $rB, $rC", (SUBFC8o g8rc:$rA, g8rc:$rC, g8rc:$rB)>;
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def SLWI : PPCAsmPseudo<"slwi $rA, $rS, $n",
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def SLWI : PPCAsmPseudo<"slwi $rA, $rS, $n",
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(ins gprc:$rA, gprc:$rS, u5imm:$n)>;
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(ins gprc:$rA, gprc:$rS, u5imm:$n)>;
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def SRWI : PPCAsmPseudo<"srwi $rA, $rS, $n",
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def SRWI : PPCAsmPseudo<"srwi $rA, $rS, $n",
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@ -1788,7 +1788,25 @@
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# FIXME: Condition register logical mnemonics
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# FIXME: Condition register logical mnemonics
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# FIXME: Subtract mnemonics
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# Subtract mnemonics
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# CHECK: addi 2, 3, -128 # encoding: [0x38,0x43,0xff,0x80]
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subi 2, 3, 128
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# CHECK: addis 2, 3, -128 # encoding: [0x3c,0x43,0xff,0x80]
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subis 2, 3, 128
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# CHECK: addic 2, 3, -128 # encoding: [0x30,0x43,0xff,0x80]
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subic 2, 3, 128
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# CHECK: addic. 2, 3, -128 # encoding: [0x34,0x43,0xff,0x80]
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subic. 2, 3, 128
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# CHECK: subf 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x50]
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sub 2, 3, 4
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# CHECK: subf. 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x51]
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sub. 2, 3, 4
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# CHECK: subfc 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x10]
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subc 2, 3, 4
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# CHECK: subfc. 2, 4, 3 # encoding: [0x7c,0x44,0x18,0x11]
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subc. 2, 3, 4
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# Compare mnemonics
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# Compare mnemonics
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