forked from OSchip/llvm-project
HexagonDepTimingClasses.h: Don't mark header functions as file local
llvm-svn: 316508
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75bda3006b
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4016da602e
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@ -6,8 +6,14 @@
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// License. See LICENSE.TXT for details.
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// License. See LICENSE.TXT for details.
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//
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_HEXAGON_HEXAGON_DEP_TIMING_CLASSES_H
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#define TARGET_HEXAGON_HEXAGON_DEP_TIMING_CLASSES_H
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static bool is_TC3x(unsigned SchedClass) {
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#include "HexagonInstrInfo.h"
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namespace llvm {
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inline bool is_TC3x(unsigned SchedClass) {
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switch (SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_1000eb10:
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case Hexagon::Sched::tc_1000eb10:
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case Hexagon::Sched::tc_2aaab1e0:
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case Hexagon::Sched::tc_2aaab1e0:
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@ -30,7 +36,7 @@ static bool is_TC3x(unsigned SchedClass) {
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}
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}
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}
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}
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static bool is_TC2early(unsigned SchedClass) {
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inline bool is_TC2early(unsigned SchedClass) {
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switch (SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_35fb9d13:
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case Hexagon::Sched::tc_35fb9d13:
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case Hexagon::Sched::tc_cbe45117:
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case Hexagon::Sched::tc_cbe45117:
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@ -40,7 +46,7 @@ static bool is_TC2early(unsigned SchedClass) {
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}
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}
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}
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}
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static bool is_TC4x(unsigned SchedClass) {
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inline bool is_TC4x(unsigned SchedClass) {
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switch (SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_09c86199:
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case Hexagon::Sched::tc_09c86199:
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case Hexagon::Sched::tc_2d1e6f5c:
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case Hexagon::Sched::tc_2d1e6f5c:
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@ -54,7 +60,7 @@ static bool is_TC4x(unsigned SchedClass) {
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}
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}
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}
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}
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static bool is_TC2(unsigned SchedClass) {
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inline bool is_TC2(unsigned SchedClass) {
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switch (SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_090485bb:
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case Hexagon::Sched::tc_090485bb:
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case Hexagon::Sched::tc_1fe8323c:
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case Hexagon::Sched::tc_1fe8323c:
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@ -86,7 +92,7 @@ static bool is_TC2(unsigned SchedClass) {
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}
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}
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}
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}
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static bool is_TC1(unsigned SchedClass) {
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inline bool is_TC1(unsigned SchedClass) {
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switch (SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_07ac815d:
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case Hexagon::Sched::tc_07ac815d:
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case Hexagon::Sched::tc_1b6011fb:
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case Hexagon::Sched::tc_1b6011fb:
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@ -130,3 +136,6 @@ static bool is_TC1(unsigned SchedClass) {
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return false;
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return false;
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}
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}
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}
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}
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} // namespace llvm
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#endif
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