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generalize this code so that fast isel handles integer truncates to i1, which 

codegen to the same thing as integer truncates to i8 (the top bits are 
just undefined).  This implements rdar://6667338

llvm-svn: 66902
This commit is contained in:
Chris Lattner 2009-03-13 16:36:42 +00:00
parent 22358bd681
commit 3fb71c8f49
1 changed files with 4 additions and 2 deletions
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6
llvm/lib/Target/X86/X86FastISel.cpp
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@ -1002,7 +1002,9 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) {
return false;
MVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
MVT DstVT = TLI.getValueType(I->getType());
if (DstVT != MVT::i8)
// This code only handles truncation to byte right now.
if (DstVT != MVT::i8 && DstVT != MVT::i1)
// All other cases should be handled by the tblgen generated code.
return false;
if (SrcVT != MVT::i16 && SrcVT != MVT::i32)
@ -1022,7 +1024,7 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) {
BuildMI(MBB, DL, TII.get(CopyOpc), CopyReg).addReg(InputReg);
// Then issue an extract_subreg.
unsigned ResultReg = FastEmitInst_extractsubreg(DstVT.getSimpleVT(),
unsigned ResultReg = FastEmitInst_extractsubreg(MVT::i8,
CopyReg, X86::SUBREG_8BIT);
if (!ResultReg)
return false;