forked from OSchip/llvm-project
[SelectionDAG] ComputeNumSignBits - add support for rotate non-uniform vector amounts
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@ -3749,7 +3749,8 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
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if (Tmp == VTBits)
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return VTBits;
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if (ConstantSDNode *C = isConstOrConstSplat(Op.getOperand(1))) {
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if (ConstantSDNode *C =
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isConstOrConstSplat(Op.getOperand(1), DemandedElts)) {
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unsigned RotAmt = C->getAPIntValue().urem(VTBits);
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// Handle rotate right by N like a rotate left by 32-N.
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@ -121,20 +121,16 @@ define <4 x i32> @rot_v4i32_mask_ashr1(<4 x i32> %a0) {
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; XOP-LABEL: rot_v4i32_mask_ashr1:
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; XOP: # %bb.0:
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; XOP-NEXT: vpsrad $25, %xmm0, %xmm0
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; XOP-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4]
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; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0
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; XOP-NEXT: vprotd $1, %xmm0, %xmm0
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; XOP-NEXT: vpbroadcastd %xmm0, %xmm0
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; XOP-NEXT: vpsravd %xmm1, %xmm0, %xmm0
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; XOP-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; XOP-NEXT: retq
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;
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; AVX512-LABEL: rot_v4i32_mask_ashr1:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,3,4]
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; AVX512-NEXT: vpsrad $25, %xmm0, %xmm0
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; AVX512-NEXT: vprolvd %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vprold $1, %xmm0, %xmm0
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; AVX512-NEXT: vpbroadcastd %xmm0, %xmm0
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; AVX512-NEXT: vpsravd %xmm1, %xmm0, %xmm0
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; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: retq
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%1 = ashr <4 x i32> %a0, <i32 25, i32 26, i32 27, i32 28>
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