forked from OSchip/llvm-project
[Tests] Autogen and improve test readability
llvm-svn: 364156
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -indvars -S | FileCheck %s
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define void @test1() nounwind {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[IV_INT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[DOTINT:%.*]], [[BB]] ]
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; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[IV_INT]] to double
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; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[INDVAR_CONV]]) #0
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; CHECK-NEXT: [[DOTINT]] = add nuw nsw i32 [[IV_INT]], 1
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[DOTINT]], 10000
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; CHECK-NEXT: br i1 [[TMP1]], label [[BB]], label [[RETURN:%.*]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb
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br label %bb
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bb: ; preds = %bb, %entry
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%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
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%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
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%1 = fadd double %x.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=2]
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%2 = fcmp olt double %1, 1.000000e+04 ; <i1> [#uses=1]
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br i1 %2, label %bb, label %return
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%iv = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
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%0 = tail call i32 @foo(double %iv) nounwind
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%1 = fadd double %iv, 1.000000e+00
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%2 = fcmp olt double %1, 1.000000e+04
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br i1 %2, label %bb, label %return
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return: ; preds = %bb
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ret void
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; CHECK-LABEL: @test1(
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; CHECK: icmp
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ret void
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}
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declare i32 @foo(double)
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define void @test2() nounwind {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[IV_INT:%.*]] = phi i32 [ -10, [[ENTRY:%.*]] ], [ [[DOTINT:%.*]], [[BB]] ]
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; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[IV_INT]] to double
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; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[INDVAR_CONV]]) #0
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; CHECK-NEXT: [[DOTINT]] = add nsw i32 [[IV_INT]], 2
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; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[DOTINT]], -1
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; CHECK-NEXT: br i1 [[TMP1]], label [[BB]], label [[RETURN:%.*]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb
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br label %bb
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bb: ; preds = %bb, %entry
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%x.0.reg2mem.0 = phi double [ -10.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
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%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
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%1 = fadd double %x.0.reg2mem.0, 2.000000e+00 ; <double> [#uses=2]
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%2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
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br i1 %2, label %bb, label %return
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%iv = phi double [ -10.000000e+00, %entry ], [ %1, %bb ]
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%0 = tail call i32 @foo(double %iv) nounwind
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%1 = fadd double %iv, 2.000000e+00
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%2 = fcmp olt double %1, -1.000000e+00
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br i1 %2, label %bb, label %return
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return: ; preds = %bb
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ret void
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; CHECK-LABEL: @test2(
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; CHECK: icmp
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ret void
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}
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define void @test3() nounwind {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[IV:%.*]] = phi double [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[BB]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[IV]]) #0
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; CHECK-NEXT: [[TMP1]] = fadd double [[IV]], 1.000000e+00
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; CHECK-NEXT: br i1 false, label [[BB]], label [[RETURN:%.*]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb
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br label %bb
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bb: ; preds = %bb, %entry
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%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
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%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind
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%1 = fadd double %x.0.reg2mem.0, 1.000000e+00
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%2 = fcmp olt double %1, -1.000000e+00
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br i1 %2, label %bb, label %return
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%iv = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
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%0 = tail call i32 @foo(double %iv) nounwind
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%1 = fadd double %iv, 1.000000e+00
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%2 = fcmp olt double %1, -1.000000e+00
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br i1 %2, label %bb, label %return
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return:
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ret void
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; CHECK-LABEL: @test3(
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; CHECK: br i1 false
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ret void
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}
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define void @test4() nounwind {
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; CHECK-LABEL: @test4(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[BB:%.*]]
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; CHECK: bb:
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; CHECK-NEXT: [[IV_INT:%.*]] = phi i32 [ 40, [[ENTRY:%.*]] ], [ [[DOTINT:%.*]], [[BB]] ]
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; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[IV_INT]] to double
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; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[INDVAR_CONV]]) #0
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; CHECK-NEXT: [[DOTINT]] = add nsw i32 [[IV_INT]], -1
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; CHECK-NEXT: br i1 false, label [[BB]], label [[RETURN:%.*]]
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; CHECK: return:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %bb
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br label %bb
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bb: ; preds = %bb, %entry
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%x.0.reg2mem.0 = phi double [ 40.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
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%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
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%1 = fadd double %x.0.reg2mem.0, -1.000000e+00 ; <double> [#uses=2]
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%2 = fcmp olt double %1, 1.000000e+00 ; <i1> [#uses=1]
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br i1 %2, label %bb, label %return
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%iv = phi double [ 40.000000e+00, %entry ], [ %1, %bb ]
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%0 = tail call i32 @foo(double %iv) nounwind
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%1 = fadd double %iv, -1.000000e+00
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%2 = fcmp olt double %1, 1.000000e+00
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br i1 %2, label %bb, label %return
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return:
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ret void
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; CHECK-LABEL: @test4(
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; CHECK-NOT: cmp
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; CHECK: br i1 false
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ret void
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}
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; PR6761
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define void @test5() nounwind {
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; <label>:0
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: br label [[TMP1:%.*]]
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; CHECK: 1:
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; CHECK-NEXT: [[DOTINT:%.*]] = phi i32 [ 9, [[TMP0:%.*]] ], [ [[DOTINT1:%.*]], [[TMP1]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @foo(double 0.000000e+00)
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; CHECK-NEXT: [[DOTINT1]] = add nsw i32 [[DOTINT]], -1
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; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[DOTINT1]], 0
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; CHECK-NEXT: br i1 [[TMP3]], label [[EXIT:%.*]], label [[TMP1]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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br label %1
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; <label>:1 ; preds = %1, %0
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%2 = phi double [ 9.000000e+00, %0 ], [ %4, %1 ] ; <double> [#uses=1]
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%3 = tail call i32 @foo(double 0.0) ; <i32> [#uses=0]
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%4 = fadd double %2, -1.000000e+00 ; <double> [#uses=2]
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%5 = fcmp ult double %4, 0.000000e+00 ; <i1> [#uses=1]
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; <label>:1
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%2 = phi double [ 9.000000e+00, %0 ], [ %4, %1 ]
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%3 = tail call i32 @foo(double 0.0)
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%4 = fadd double %2, -1.000000e+00
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%5 = fcmp ult double %4, 0.000000e+00
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br i1 %5, label %exit, label %1
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exit:
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ret void
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; CHECK-LABEL: @test5(
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; CHECK: icmp slt i32 {{.*}}, 0
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; CHECK-NEXT: br i1
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}
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