[Tests] Autogen and improve test readability

llvm-svn: 364156
This commit is contained in:
Philip Reames 2019-06-23 17:13:53 +00:00
parent d22a2a9a72
commit 3f8264b062
1 changed files with 95 additions and 46 deletions

View File

@ -1,92 +1,141 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -indvars -S | FileCheck %s
define void @test1() nounwind {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[IV_INT:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[DOTINT:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[IV_INT]] to double
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[INDVAR_CONV]]) #0
; CHECK-NEXT: [[DOTINT]] = add nuw nsw i32 [[IV_INT]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[DOTINT]], 10000
; CHECK-NEXT: br i1 [[TMP1]], label [[BB]], label [[RETURN:%.*]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
br label %bb
br label %bb
bb: ; preds = %bb, %entry
%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
%1 = fadd double %x.0.reg2mem.0, 1.000000e+00 ; <double> [#uses=2]
%2 = fcmp olt double %1, 1.000000e+04 ; <i1> [#uses=1]
br i1 %2, label %bb, label %return
%iv = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
%0 = tail call i32 @foo(double %iv) nounwind
%1 = fadd double %iv, 1.000000e+00
%2 = fcmp olt double %1, 1.000000e+04
br i1 %2, label %bb, label %return
return: ; preds = %bb
ret void
; CHECK-LABEL: @test1(
; CHECK: icmp
ret void
}
declare i32 @foo(double)
define void @test2() nounwind {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[IV_INT:%.*]] = phi i32 [ -10, [[ENTRY:%.*]] ], [ [[DOTINT:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[IV_INT]] to double
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[INDVAR_CONV]]) #0
; CHECK-NEXT: [[DOTINT]] = add nsw i32 [[IV_INT]], 2
; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[DOTINT]], -1
; CHECK-NEXT: br i1 [[TMP1]], label [[BB]], label [[RETURN:%.*]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
br label %bb
br label %bb
bb: ; preds = %bb, %entry
%x.0.reg2mem.0 = phi double [ -10.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
%1 = fadd double %x.0.reg2mem.0, 2.000000e+00 ; <double> [#uses=2]
%2 = fcmp olt double %1, -1.000000e+00 ; <i1> [#uses=1]
br i1 %2, label %bb, label %return
%iv = phi double [ -10.000000e+00, %entry ], [ %1, %bb ]
%0 = tail call i32 @foo(double %iv) nounwind
%1 = fadd double %iv, 2.000000e+00
%2 = fcmp olt double %1, -1.000000e+00
br i1 %2, label %bb, label %return
return: ; preds = %bb
ret void
; CHECK-LABEL: @test2(
; CHECK: icmp
ret void
}
define void @test3() nounwind {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[IV:%.*]] = phi double [ 0.000000e+00, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[BB]] ]
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[IV]]) #0
; CHECK-NEXT: [[TMP1]] = fadd double [[IV]], 1.000000e+00
; CHECK-NEXT: br i1 false, label [[BB]], label [[RETURN:%.*]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
br label %bb
br label %bb
bb: ; preds = %bb, %entry
%x.0.reg2mem.0 = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind
%1 = fadd double %x.0.reg2mem.0, 1.000000e+00
%2 = fcmp olt double %1, -1.000000e+00
br i1 %2, label %bb, label %return
%iv = phi double [ 0.000000e+00, %entry ], [ %1, %bb ]
%0 = tail call i32 @foo(double %iv) nounwind
%1 = fadd double %iv, 1.000000e+00
%2 = fcmp olt double %1, -1.000000e+00
br i1 %2, label %bb, label %return
return:
ret void
; CHECK-LABEL: @test3(
; CHECK: br i1 false
ret void
}
define void @test4() nounwind {
; CHECK-LABEL: @test4(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: bb:
; CHECK-NEXT: [[IV_INT:%.*]] = phi i32 [ 40, [[ENTRY:%.*]] ], [ [[DOTINT:%.*]], [[BB]] ]
; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[IV_INT]] to double
; CHECK-NEXT: [[TMP0:%.*]] = tail call i32 @foo(double [[INDVAR_CONV]]) #0
; CHECK-NEXT: [[DOTINT]] = add nsw i32 [[IV_INT]], -1
; CHECK-NEXT: br i1 false, label [[BB]], label [[RETURN:%.*]]
; CHECK: return:
; CHECK-NEXT: ret void
;
entry:
br label %bb
br label %bb
bb: ; preds = %bb, %entry
%x.0.reg2mem.0 = phi double [ 40.000000e+00, %entry ], [ %1, %bb ] ; <double> [#uses=2]
%0 = tail call i32 @foo(double %x.0.reg2mem.0) nounwind ; <i32> [#uses=0]
%1 = fadd double %x.0.reg2mem.0, -1.000000e+00 ; <double> [#uses=2]
%2 = fcmp olt double %1, 1.000000e+00 ; <i1> [#uses=1]
br i1 %2, label %bb, label %return
%iv = phi double [ 40.000000e+00, %entry ], [ %1, %bb ]
%0 = tail call i32 @foo(double %iv) nounwind
%1 = fadd double %iv, -1.000000e+00
%2 = fcmp olt double %1, 1.000000e+00
br i1 %2, label %bb, label %return
return:
ret void
; CHECK-LABEL: @test4(
; CHECK-NOT: cmp
; CHECK: br i1 false
ret void
}
; PR6761
define void @test5() nounwind {
; <label>:0
; CHECK-LABEL: @test5(
; CHECK-NEXT: br label [[TMP1:%.*]]
; CHECK: 1:
; CHECK-NEXT: [[DOTINT:%.*]] = phi i32 [ 9, [[TMP0:%.*]] ], [ [[DOTINT1:%.*]], [[TMP1]] ]
; CHECK-NEXT: [[TMP2:%.*]] = tail call i32 @foo(double 0.000000e+00)
; CHECK-NEXT: [[DOTINT1]] = add nsw i32 [[DOTINT]], -1
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[DOTINT1]], 0
; CHECK-NEXT: br i1 [[TMP3]], label [[EXIT:%.*]], label [[TMP1]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
br label %1
; <label>:1 ; preds = %1, %0
%2 = phi double [ 9.000000e+00, %0 ], [ %4, %1 ] ; <double> [#uses=1]
%3 = tail call i32 @foo(double 0.0) ; <i32> [#uses=0]
%4 = fadd double %2, -1.000000e+00 ; <double> [#uses=2]
%5 = fcmp ult double %4, 0.000000e+00 ; <i1> [#uses=1]
; <label>:1
%2 = phi double [ 9.000000e+00, %0 ], [ %4, %1 ]
%3 = tail call i32 @foo(double 0.0)
%4 = fadd double %2, -1.000000e+00
%5 = fcmp ult double %4, 0.000000e+00
br i1 %5, label %exit, label %1
exit:
ret void
; CHECK-LABEL: @test5(
; CHECK: icmp slt i32 {{.*}}, 0
; CHECK-NEXT: br i1
}