forked from OSchip/llvm-project
Move some of the defines down to more natural locations, consolidating
the target identifying macros at the top, including subtarget macros. llvm-svn: 140689
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@ -1691,16 +1691,6 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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DefineStd(Builder, "i386", Opts);
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}
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if (HasAES)
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Builder.defineMacro("__AES__");
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if (HasAVX)
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Builder.defineMacro("__AVX__");
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// Target properties.
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Builder.defineMacro("__LITTLE_ENDIAN__");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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// Subtarget options.
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// FIXME: We are hard-coding the tune parameters based on the CPU, but they
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// truly should be based on -mtune options.
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@ -1831,11 +1821,21 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
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break;
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}
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// Target properties.
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Builder.defineMacro("__LITTLE_ENDIAN__");
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Builder.defineMacro("__REGISTER_PREFIX__", "");
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// Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
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// functions in glibc header files that use FP Stack inline asm which the
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// backend can't deal with (PR879).
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Builder.defineMacro("__NO_MATH_INLINES");
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if (HasAES)
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Builder.defineMacro("__AES__");
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if (HasAVX)
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Builder.defineMacro("__AVX__");
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// Each case falls through to the previous one here.
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switch (SSELevel) {
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case SSE42:
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