forked from OSchip/llvm-project
Remove more of 'else's after 'returns'. No functional change.
llvm-svn: 170497
This commit is contained in:
parent
5dd8291cbe
commit
3f194c8f4f
|
@ -2281,7 +2281,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
|
|||
DAG.getConstant(MinVal, N0.getValueType()),
|
||||
ISD::SETEQ);
|
||||
// If we have setugt X, Max-1, turn it into seteq X, Max
|
||||
else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1)
|
||||
if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1)
|
||||
return DAG.getSetCC(dl, VT, N0,
|
||||
DAG.getConstant(MaxVal, N0.getValueType()),
|
||||
ISD::SETEQ);
|
||||
|
@ -2555,7 +2555,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
|
|||
if (DAG.isCommutativeBinOp(N0.getOpcode()))
|
||||
return DAG.getSetCC(dl, VT, N0.getOperand(0),
|
||||
DAG.getConstant(0, N0.getValueType()), Cond);
|
||||
else if (N0.getNode()->hasOneUse()) {
|
||||
if (N0.getNode()->hasOneUse()) {
|
||||
assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
|
||||
// (Z-X) == X --> Z == X<<1
|
||||
SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1,
|
||||
|
@ -2571,14 +2571,14 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
|
|||
if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
|
||||
N1.getOpcode() == ISD::XOR) {
|
||||
// Simplify X == (X+Z) --> Z == 0
|
||||
if (N1.getOperand(0) == N0) {
|
||||
if (N1.getOperand(0) == N0)
|
||||
return DAG.getSetCC(dl, VT, N1.getOperand(1),
|
||||
DAG.getConstant(0, N1.getValueType()), Cond);
|
||||
} else if (N1.getOperand(1) == N0) {
|
||||
if (DAG.isCommutativeBinOp(N1.getOpcode())) {
|
||||
if (N1.getOperand(1) == N0) {
|
||||
if (DAG.isCommutativeBinOp(N1.getOpcode()))
|
||||
return DAG.getSetCC(dl, VT, N1.getOperand(0),
|
||||
DAG.getConstant(0, N1.getValueType()), Cond);
|
||||
} else if (N1.getNode()->hasOneUse()) {
|
||||
if (N1.getNode()->hasOneUse()) {
|
||||
assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
|
||||
// X == (Z-X) --> X<<1 == Z
|
||||
SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
|
||||
|
|
Loading…
Reference in New Issue