diff --git a/llvm/test/Transforms/InstSimplify/call-callconv.ll b/llvm/test/Transforms/InstCombine/call-callconv.ll
similarity index 54%
rename from llvm/test/Transforms/InstSimplify/call-callconv.ll
rename to llvm/test/Transforms/InstCombine/call-callconv.ll
index d07d387493a5..f7f0d3aaa46b 100644
--- a/llvm/test/Transforms/InstSimplify/call-callconv.ll
+++ b/llvm/test/Transforms/InstCombine/call-callconv.ll
@@ -1,48 +1,53 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 ; Verify that the non-default calling conv doesn't prevent the libcall simplification
 
 @.str = private unnamed_addr constant [4 x i8] c"abc\00", align 1
 
 define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
-; CHECK: _abs
+; CHECK-LABEL: @_abs(
+; CHECK-NEXT:    [[ISPOS:%.*]] = icmp slt i32 [[I:%.*]], 0
+; CHECK-NEXT:    [[NEG:%.*]] = sub i32 0, [[I]]
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[ISPOS]], i32 [[NEG]], i32 [[I]]
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
   %call = tail call arm_aapcscc i32 @abs(i32 %i) nounwind readnone
   ret i32 %call
-; CHECK: %[[ISPOS:.*]] = icmp slt i32 %i, 0
-; CHECK: %[[NEG:.*]] = sub i32 0, %i
-; CHECK: %[[RET:.*]] = select i1 %[[ISPOS]], i32 %[[NEG]], i32 %i
-; CHECK: ret i32 %[[RET]]
 }
 
 declare arm_aapcscc i32 @abs(i32) nounwind readnone
 
 define arm_aapcscc i32 @_labs(i32 %i) nounwind readnone {
-; CHECK: _labs
+; CHECK-LABEL: @_labs(
+; CHECK-NEXT:    [[ISPOS:%.*]] = icmp slt i32 [[I:%.*]], 0
+; CHECK-NEXT:    [[NEG:%.*]] = sub i32 0, [[I]]
+; CHECK-NEXT:    [[TMP1:%.*]] = select i1 [[ISPOS]], i32 [[NEG]], i32 [[I]]
+; CHECK-NEXT:    ret i32 [[TMP1]]
+;
   %call = tail call arm_aapcscc i32 @labs(i32 %i) nounwind readnone
   ret i32 %call
-; CHECK: %[[ISPOS:.*]] = icmp slt i32 %i, 0
-; CHECK: %[[NEG:.*]] = sub i32 0, %i
-; CHECK: %[[RET:.*]] = select i1 %[[ISPOS]], i32 %[[NEG]], i32 %i
-; CHECK: ret i32 %[[RET]]
 }
 
 declare arm_aapcscc i32 @labs(i32) nounwind readnone
 
 define arm_aapcscc i32 @_strlen1() {
-; CHECK: _strlen1
+; CHECK-LABEL: @_strlen1(
+; CHECK-NEXT:    ret i32 3
+;
   %call = tail call arm_aapcscc i32 @strlen(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0))
   ret i32 %call
-; CHECK: ret i32 3
 }
 
 declare arm_aapcscc i32 @strlen(i8*)
 
 define arm_aapcscc zeroext i1 @_strlen2(i8* %str) {
-; CHECK: _strlen2
+; CHECK-LABEL: @_strlen2(
+; CHECK-NEXT:    [[STRLENFIRST:%.*]] = load i8, i8* [[STR:%.*]], align 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[STRLENFIRST]], 0
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
   %call = tail call arm_aapcscc i32 @strlen(i8* %str)
   %cmp = icmp ne i32 %call, 0
   ret i1 %cmp
-
-; CHECK: %[[STRLENFIRST:.*]] = load i8, i8* %str
-; CHECK: %[[CMP:.*]] = icmp ne i8 %[[STRLENFIRST]], 0
-; CHECK: ret i1 %[[CMP]]
 }
+