forked from OSchip/llvm-project
Temporarily revert "Subtract isn't commutative, fix this for MMX psub."
It's causing failures on the atom bot. llvm-svn: 181812
This commit is contained in:
Eric Christopher
parent
e16befb5f6
commit
3eee7454cf
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@ -357,21 +357,21 @@ defm MMX_PHADDSW : SS3I_binop_rm_int_mm<0x03, "phaddsw",int_x86_ssse3_phadd_sw,
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defm MMX_PSUBB : MMXI_binop_rm_int<0xF8, "psubb", int_x86_mmx_psub_b,
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MMX_INTALU_ITINS>;
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defm MMX_PSUBW : MMXI_binop_rm_int<0xF9, "psubw", int_x86_mmx_psub_w,
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MMX_INTALU_ITINS>;
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MMX_INTALU_ITINS, 1>;
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defm MMX_PSUBD : MMXI_binop_rm_int<0xFA, "psubd", int_x86_mmx_psub_d,
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MMX_INTALU_ITINS>;
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MMX_INTALU_ITINS, 1>;
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defm MMX_PSUBQ : MMXI_binop_rm_int<0xFB, "psubq", int_x86_mmx_psub_q,
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MMX_INTALUQ_ITINS>;
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MMX_INTALUQ_ITINS, 1>;
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defm MMX_PSUBSB : MMXI_binop_rm_int<0xE8, "psubsb" , int_x86_mmx_psubs_b,
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MMX_INTALU_ITINS>;
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MMX_INTALU_ITINS, 1>;
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defm MMX_PSUBSW : MMXI_binop_rm_int<0xE9, "psubsw" , int_x86_mmx_psubs_w,
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MMX_INTALU_ITINS>;
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MMX_INTALU_ITINS, 1>;
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defm MMX_PSUBUSB : MMXI_binop_rm_int<0xD8, "psubusb", int_x86_mmx_psubus_b,
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MMX_INTALU_ITINS>;
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MMX_INTALU_ITINS, 1>;
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defm MMX_PSUBUSW : MMXI_binop_rm_int<0xD9, "psubusw", int_x86_mmx_psubus_w,
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MMX_INTALU_ITINS>;
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MMX_INTALU_ITINS, 1>;
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defm MMX_PHSUBW : SS3I_binop_rm_int_mm<0x05, "phsubw", int_x86_ssse3_phsub_w,
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MMX_PHADDSUBW>;
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@ -1,213 +0,0 @@
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; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s
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; MMX packed sub opcodes were wrongly marked as commutative.
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; This test checks that the operands of packed sub instructions are
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; never interchanged by the "Two-Address instruction pass".
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declare { i64, double } @getFirstParam()
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declare { i64, double } @getSecondParam()
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define i64 @test_psubb() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>
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%3 = bitcast <8 x i8> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>
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%5 = bitcast <8 x i8> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psub.b(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <8 x i8>
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%8 = bitcast <8 x i8> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubb:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubb [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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define i64 @test_psubw() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>
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%3 = bitcast <4 x i16> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>
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%5 = bitcast <4 x i16> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psub.w(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <4 x i16>
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%8 = bitcast <4 x i16> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubw:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubw [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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define i64 @test_psubd() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <2 x i32>
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%3 = bitcast <2 x i32> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <2 x i32>
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%5 = bitcast <2 x i32> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psub.d(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <2 x i32>
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%8 = bitcast <2 x i32> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubd:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubd [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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define i64 @test_psubsb() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>
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%3 = bitcast <8 x i8> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>
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%5 = bitcast <8 x i8> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <8 x i8>
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%8 = bitcast <8 x i8> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubsb:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubsb [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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define i64 @test_psubswv() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>
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%3 = bitcast <4 x i16> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>
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%5 = bitcast <4 x i16> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <4 x i16>
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%8 = bitcast <4 x i16> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubswv:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubsw [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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define i64 @test_psubusbv() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <8 x i8>
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%3 = bitcast <8 x i8> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <8 x i8>
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%5 = bitcast <8 x i8> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <8 x i8>
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%8 = bitcast <8 x i8> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubusbv:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubusb [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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define i64 @test_psubuswv() {
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entry:
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%call = tail call { i64, double } @getFirstParam()
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%0 = extractvalue { i64, double } %call, 0
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%call2 = tail call { i64, double } @getSecondParam()
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%1 = extractvalue { i64, double } %call2, 0
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%__m1.0.insert.i = insertelement <1 x i64> undef, i64 %0, i32 0
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%__m2.0.insert.i = insertelement <1 x i64> undef, i64 %1, i32 0
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%2 = bitcast <1 x i64> %__m1.0.insert.i to <4 x i16>
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%3 = bitcast <4 x i16> %2 to x86_mmx
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%4 = bitcast <1 x i64> %__m2.0.insert.i to <4 x i16>
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%5 = bitcast <4 x i16> %4 to x86_mmx
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%6 = tail call x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx %3, x86_mmx %5) nounwind
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%7 = bitcast x86_mmx %6 to <4 x i16>
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%8 = bitcast <4 x i16> %7 to <1 x i64>
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%retval.0.extract.i15 = extractelement <1 x i64> %8, i32 0
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ret i64 %retval.0.extract.i15
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}
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; CHECK: test_psubuswv:
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; CHECK: callq getFirstParam
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; CHECK: callq getSecondParam
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; CHECK: movd %rax, [[PARAM2:%[a-z0-9]+]]
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; CHECK: movq (%rsp), [[PARAM1:%[a-z0-9]+]]
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; CHECK: psubusw [[PARAM2]], [[PARAM1]]
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; CHECK: ret
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declare x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psub.d(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psub.w(x86_mmx, x86_mmx) nounwind readnone
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declare x86_mmx @llvm.x86.mmx.psub.b(x86_mmx, x86_mmx) nounwind readnone
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