forked from OSchip/llvm-project
[x86][inline-asm][llvm] accept 'v' constraint
Commit in the name of:Coby Tayree
1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)
This patch applies the needed changes to clang
clang patch: https://reviews.llvm.org/D25004
Differential Revision: D25005
llvm-svn: 283717
This commit is contained in:
Michael Zuckerman
parent
fe2b9b4fbf
commit
3eeac2d56b
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@ -32024,6 +32024,7 @@ X86TargetLowering::getConstraintType(StringRef Constraint) const {
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case 'u':
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case 'y':
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case 'x':
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case 'v':
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case 'Y':
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case 'l':
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return C_RegisterClass;
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@ -32093,6 +32094,10 @@ TargetLowering::ConstraintWeight
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if (type->isX86_MMXTy() && Subtarget.hasMMX())
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weight = CW_SpecificReg;
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break;
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case 'v':
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if ((type->getPrimitiveSizeInBits() == 512) && Subtarget.hasAVX512())
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weight = CW_Register;
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LLVM_FALLTHROUGH;
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case 'x':
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case 'Y':
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if (((type->getPrimitiveSizeInBits() == 128) && Subtarget.hasSSE1()) ||
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@ -32429,17 +32434,23 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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case 'Y': // SSE_REGS if SSE2 allowed
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if (!Subtarget.hasSSE2()) break;
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LLVM_FALLTHROUGH;
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case 'v':
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case 'x': // SSE_REGS if SSE1 allowed or AVX_REGS if AVX allowed
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if (!Subtarget.hasSSE1()) break;
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bool VConstraint = (Constraint[0] == 'v');
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switch (VT.SimpleTy) {
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default: break;
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// Scalar SSE types.
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case MVT::f32:
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case MVT::i32:
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if (VConstraint && Subtarget.hasAVX512() && Subtarget.hasVLX())
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return std::make_pair(0U, &X86::FR32XRegClass);
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return std::make_pair(0U, &X86::FR32RegClass);
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case MVT::f64:
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case MVT::i64:
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if (VConstraint && Subtarget.hasVLX())
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return std::make_pair(0U, &X86::FR64XRegClass);
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return std::make_pair(0U, &X86::FR64RegClass);
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// TODO: Handle f128 and i128 in FR128RegClass after it is tested well.
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// Vector types.
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@ -32449,6 +32460,8 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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case MVT::v2i64:
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case MVT::v4f32:
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case MVT::v2f64:
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if (VConstraint && Subtarget.hasVLX())
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return std::make_pair(0U, &X86::VR128XRegClass);
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return std::make_pair(0U, &X86::VR128RegClass);
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// AVX types.
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case MVT::v32i8:
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@ -32457,6 +32470,8 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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case MVT::v4i64:
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case MVT::v8f32:
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case MVT::v4f64:
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if (VConstraint && Subtarget.hasVLX())
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return std::make_pair(0U, &X86::VR256XRegClass);
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return std::make_pair(0U, &X86::VR256RegClass);
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case MVT::v8f64:
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case MVT::v16f32:
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@ -0,0 +1,136 @@
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; RUN: not llc < %s -mtriple i386-unknown-linux-gnu -mattr +avx 1> /dev/null 2> %t
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; RUN: FileCheck %s --input-file %t
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define <4 x float> @testXMM_1(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_2(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "movapd $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_3(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "vmovapd $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_4(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "vmpsadbw $$0, $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_5(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l, i32 %_l)
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ret <4 x float> %0
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}
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define i32 @testXMM_6(i32 returned %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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tail call void asm sideeffect "vmovd $0, %eax", "v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l)
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ret i32 %_l
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}
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define <4 x float> @testXMM_7(<4 x float> returned %_xmm0) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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tail call void asm sideeffect "vmovmskps $0, %eax", "v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0)
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ret <4 x float> %_xmm0
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}
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define i32 @testXMM_8(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call i32 asm "vmulsd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l, <4 x float> %_xmm0)
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ret i32 %0
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}
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define <4 x float> @testXMM_9(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "vorpd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_10(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "pabsb $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_11(<4 x float> %_xmm0, i32 %_l) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <4 x float> asm "vpabsd $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i32 %_l)
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ret <4 x float> %0
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}
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define <8 x float> @testYMM_1(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_2(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vmovapd $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_3(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_4(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vorpd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vmulps $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_6(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vmulpd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_7(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vmovups $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_8(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: error: inline assembly requires more registers than available
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entry:
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%0 = tail call <8 x float> asm "vmovupd $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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@ -0,0 +1,136 @@
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; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s
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; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
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define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmovhlps %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_2(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: movapd %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "movapd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_3(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmovapd %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vmovapd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_4(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmpsadbw $0, %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vmpsadbw $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_5(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vminpd %xmm0, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, i64 %_l)
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ret <4 x float> %0
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}
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define i64 @testXMM_6(i64 returned %_l) {
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; CHECK: vmovd %xmm0, %eax
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entry:
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tail call void asm sideeffect "vmovd $0, %eax", "v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret i64 %_l
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}
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define <4 x float> @testXMM_7(<4 x float> returned %_xmm0) {
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; CHECK: vmovmskps %xmm0, %eax
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entry:
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tail call void asm sideeffect "vmovmskps $0, %rax", "v,~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0)
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ret <4 x float> %_xmm0
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}
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define i64 @testXMM_8(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vmulsd %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call i64 asm "vmulsd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret i64 %0
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}
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define <4 x float> @testXMM_9(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vorpd %xmm1, %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vorpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_10(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: pabsb %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "pabsb $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <4 x float> @testXMM_11(<4 x float> %_xmm0, i64 %_l) {
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; CHECK: vpabsd %xmm0, %xmm0
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entry:
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%0 = tail call <4 x float> asm "vpabsd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(i64 %_l)
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ret <4 x float> %0
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}
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define <8 x float> @testYMM_1(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmovsldup %ymm0, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm0)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_2(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vmovapd %ymm1, %ymm0
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entry:
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%0 = tail call <8 x float> asm "vmovapd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
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ret <8 x float> %0
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}
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define <8 x float> @testYMM_3(<8 x float> %_ymm0, <8 x float> %_ymm1) {
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; CHECK: vminpd %ymm1, %ymm0, %ymm0
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entry:
|
||||
%0 = tail call <8 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_4(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: vorpd %ymm1, %ymm0, %ymm0
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vorpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: vmulps %ymm1, %ymm0, %ymm0
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmulps $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_6(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: vmulpd %ymm1, %ymm0, %ymm0
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmulpd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_7(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: vmovups %ymm1, %ymm0
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmovups $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_8(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: vmovupd %ymm1, %ymm0
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmovupd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
|
||||
|
||||
define <16 x float> @testZMM_1(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpternlogd $0, %zmm1, %zmm0, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpternlogd $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm0)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
define <16 x float> @testZMM_2(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpabsq %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpabsq $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_3(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpaddd %zmm1, %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpaddd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_4(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpaddq %zmm1, %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpaddq $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_5(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpandd %zmm1, %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_6(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpandnd %zmm1, %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_7(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vpmaxsd %zmm1, %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vpmaxsd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_8(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vmovups %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vmovups $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <16 x float> @testZMM_9(<16 x float> %_zmm0, <16 x float> %_zmm1) {
|
||||
entry:
|
||||
; CHECK: vmovupd %zmm1, %zmm0
|
||||
%0 = tail call <16 x float> asm "vmovupd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
|
||||
ret <16 x float> %0
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,138 @@
|
|||
; RUN: not llc < %s -mtriple i386-unknown-linux-gnu -mattr +avx512vl 1> /dev/null 2> %t
|
||||
; RUN: FileCheck %s --input-file %t
|
||||
|
||||
define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <4 x float> @testXMM_2(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <4 x float> asm "vmovapd $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <4 x float> @testXMM_3(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <4 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i64 %_l, i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define i64 @testXMM_4(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call i64 asm "vmulsd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
|
||||
define <4 x float> @testXMM_5(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <4 x float> asm "vpabsq $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <4 x float> @testXMM_6(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <4 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0, i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <4 x float> @testXMM_7(<4 x float> %_xmm0, i64 %_l) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <4 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0, i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_1(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_2(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmovapd $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_3(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_4(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vpabsq $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_5(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_6(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_7(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vpminud $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_8(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vpmaxsd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_9(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmovups $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
||||
define <8 x float> @testYMM_10(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
; CHECK: error: inline assembly requires more registers than available
|
||||
entry:
|
||||
%0 = tail call <8 x float> asm "vmovupd $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,121 @@
|
|||
; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s
|
||||
|
||||
define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vmovhlps %xmm17, %xmm16, %xmm16
|
||||
%0 = tail call <4 x float> asm "vmovhlps $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
define <4 x float> @testXMM_2(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vmovapd %xmm16, %xmm16
|
||||
%0 = tail call <4 x float> asm "vmovapd $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
define <4 x float> @testXMM_3(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vminpd %xmm16, %xmm16, %xmm16
|
||||
%0 = tail call <4 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(i64 %_l, i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
define i64 @testXMM_4(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vmulsd %xmm17, %xmm16, %xmm16
|
||||
%0 = tail call i64 asm "vmulsd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(i64 %_l, <4 x float> %_xmm0)
|
||||
ret i64 %0
|
||||
}
|
||||
|
||||
define <4 x float> @testXMM_5(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vpabsq %xmm16, %xmm16
|
||||
%0 = tail call <4 x float> asm "vpabsq $1, $0", "=v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
define <4 x float> @testXMM_6(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vpandd %xmm16, %xmm17, %xmm16
|
||||
%0 = tail call <4 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0, i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
define <4 x float> @testXMM_7(<4 x float> %_xmm0, i64 %_l) {
|
||||
entry:
|
||||
; CHECK: vpandnd %xmm16, %xmm17, %xmm16
|
||||
%0 = tail call <4 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{dirflag},~{fpsr},~{flags}"(<4 x float> %_xmm0, i64 %_l)
|
||||
ret <4 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_1(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vmovsldup %ymm16, %ymm16
|
||||
%0 = tail call <8 x float> asm "vmovsldup $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_2(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vmovapd %ymm16, %ymm16
|
||||
%0 = tail call <8 x float> asm "vmovapd $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_3(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vminpd %ymm16, %ymm16, %ymm16
|
||||
%0 = tail call <8 x float> asm "vminpd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_4(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vpabsq %ymm16, %ymm16
|
||||
%0 = tail call <8 x float> asm "vpabsq $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_5(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vpandd %ymm16, %ymm17, %ymm16
|
||||
%0 = tail call <8 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_6(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vpandnd %ymm16, %ymm17, %ymm16
|
||||
%0 = tail call <8 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_7(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vpminud %ymm16, %ymm17, %ymm16
|
||||
%0 = tail call <8 x float> asm "vpminud $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_8(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vpmaxsd %ymm16, %ymm17, %ymm16
|
||||
%0 = tail call <8 x float> asm "vpmaxsd $1, $2, $0", "=v,v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1, <8 x float> %_ymm0)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_9(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vmovups %ymm16, %ymm16
|
||||
%0 = tail call <8 x float> asm "vmovups $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
define <8 x float> @testYMM_10(<8 x float> %_ymm0, <8 x float> %_ymm1) {
|
||||
entry:
|
||||
; CHECK: vmovupd %ymm16, %ymm16
|
||||
%0 = tail call <8 x float> asm "vmovupd $1, $0", "=v,v,~{ymm0},~{ymm1},~{ymm2},~{ymm3},~{ymm4},~{ymm5},~{ymm6},~{ymm7},~{ymm8},~{ymm9},~{ymm10},~{ymm11},~{ymm12},~{ymm13},~{ymm14},~{ymm15},~{dirflag},~{fpsr},~{flags}"(<8 x float> %_ymm1)
|
||||
ret <8 x float> %0
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue