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AMDGPU: Document address space mapping 

Summary:
Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in
Doxygen comments. This patch adds the description to user guide for
AMDGPU back-end.

Patch By: Vedran Miletić

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17046

llvm-svn: 265500
This commit is contained in:
Tom Stellard 2016-04-06 01:29:19 +00:00
parent 285c8ff753
commit 3ec09e61d1
1 changed files with 23 additions and 0 deletions

23
llvm/docs/AMDGPUUsage.rst
View File

@ -9,6 +9,29 @@ The AMDGPU back-end provides ISA code generation for AMD GPUs, starting with
the R600 family up until the current Volcanic Islands (GCN Gen 3).
Conventions
===========
Address Spaces
--------------
The AMDGPU back-end uses the following address space mapping:
============= ============================================
Address Space Memory Space
============= ============================================
0 Private
1 Global
2 Constant
3 Local
4 Generic (Flat)
5 Region
============= ============================================
The terminology in the table, aside from the region memory space, is from the
OpenCL standard.
Assembler
=========