forked from OSchip/llvm-project
Remember to promote load/store types for stack to register size.
llvm-svn: 115984
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@ -629,6 +629,9 @@ bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Reg,
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bool ARMFastISel::ARMLoadAlloca(const Instruction *I, EVT VT) {
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Value *Op0 = I->getOperand(0);
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// Promote load/store types.
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if (VT == MVT::i8 || VT == MVT::i16) VT = MVT::i32;
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// Verify it's an alloca.
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op0)) {
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DenseMap<const AllocaInst*, int>::iterator SI =
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@ -735,6 +738,9 @@ bool ARMFastISel::SelectLoad(const Instruction *I) {
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bool ARMFastISel::ARMStoreAlloca(const Instruction *I, unsigned SrcReg, EVT VT){
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Value *Op1 = I->getOperand(1);
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// Promote load/store types.
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if (VT == MVT::i8 || VT == MVT::i16) VT = MVT::i32;
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// Verify it's an alloca.
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op1)) {
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DenseMap<const AllocaInst*, int>::iterator SI =
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