[sanitizer] Refactor GetNextInstructionPc/GetPreviousInstructionPc

x86 uses offset 1 while most RISC architectures use offset 4.
Check x86 first to prevent changes for new RISC architectures.

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D120362
This commit is contained in:
Fangrui Song 2022-02-22 16:20:40 -08:00
parent 3ef7e6c53c
commit 3de5322b5f
2 changed files with 9 additions and 9 deletions

View File

@ -20,11 +20,10 @@
namespace __sanitizer {
uptr StackTrace::GetNextInstructionPc(uptr pc) {
#if defined(__sparc__) || defined(__mips__)
return pc + 8;
#elif defined(__powerpc__) || defined(__arm__) || defined(__aarch64__) || \
defined(__hexagon__)
#if defined(__aarch64__)
return STRIP_PAC_PC((void *)pc) + 4;
#elif defined(__sparc__) || defined(__mips__)
return pc + 8;
#elif SANITIZER_RISCV64
// Current check order is 4 -> 2 -> 6 -> 8
u8 InsnByte = *(u8 *)(pc);
@ -47,8 +46,10 @@ uptr StackTrace::GetNextInstructionPc(uptr pc) {
}
// bail-out if could not figure out the instruction size
return 0;
#else
#elif SANITIZER_I386 || SANITIZER_X32 || SANITIZER_X64
return pc + 1;
#else
return pc + 4;
#endif
}

View File

@ -88,9 +88,6 @@ uptr StackTrace::GetPreviousInstructionPc(uptr pc) {
// so we return (pc-2) in that case in order to be safe.
// For A32 mode we return (pc-4) because all instructions are 32 bit long.
return (pc - 3) & (~1);
#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__aarch64__)
// PCs are always 4 byte aligned.
return pc - 4;
#elif defined(__sparc__) || defined(__mips__)
return pc - 8;
#elif SANITIZER_RISCV64
@ -101,8 +98,10 @@ uptr StackTrace::GetPreviousInstructionPc(uptr pc) {
// It seems difficult to figure out the exact instruction length -
// pc - 2 seems like a safe option for the purposes of stack tracing
return pc - 2;
#else
#elif SANITIZER_I386 || SANITIZER_X32 || SANITIZER_X64
return pc - 1;
#else
return pc - 4;
#endif
}