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[AVX512] Add support for popcount of v8i64 and v16i32 with and without BWI instructions. 

Without BWI we have to split the vectors into 256-bit vectors so we can use AVX2 pshufb and then concatenate the results.

llvm-svn: 266950
This commit is contained in:
Craig Topper 2016-04-21 03:57:24 +00:00
parent 0ab44dbf8f
commit 3dd625ce79
2 changed files with 97 additions and 94 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
llvm/lib/Target/X86/X86ISelLowering.cpp
View File

@ -1369,6 +1369,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::AND, VT, Legal);
setOperationAction(ISD::OR, VT, Legal);
setOperationAction(ISD::XOR, VT, Legal);
setOperationAction(ISD::CTPOP, VT, Custom);
}
if (Subtarget.hasCDI()) {
@ -20677,6 +20678,18 @@ static SDValue LowerVectorCTPOP(SDValue Op, const X86Subtarget &Subtarget,
LowerVectorCTPOPInRegLUT(RHS, DL, Subtarget, DAG));
}
if (VT.is512BitVector() && !Subtarget.hasBWI()) {
unsigned NumElems = VT.getVectorNumElements();
// Extract each 256-bit vector, compute pop count and concat the result.
SDValue LHS = extract256BitVector(Op0, 0, DAG, DL);
SDValue RHS = extract256BitVector(Op0, NumElems / 2, DAG, DL);
return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT,
LowerVectorCTPOPInRegLUT(LHS, DL, Subtarget, DAG),
LowerVectorCTPOPInRegLUT(RHS, DL, Subtarget, DAG));
}
return LowerVectorCTPOPInRegLUT(Op0, DL, Subtarget, DAG);
}

178
llvm/test/CodeGen/X86/vector-popcnt-512.ll
View File

@ -3,105 +3,95 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
; ALL-LABEL: testv8i64:
; ALL: ## BB#0:
; ALL-NEXT: vextracti32x4 $3, %zmm0, %xmm1
; ALL-NEXT: vpextrq $1, %xmm1, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm2
; ALL-NEXT: vmovq %xmm1, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm1
; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; ALL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
; ALL-NEXT: vpextrq $1, %xmm2, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm3
; ALL-NEXT: vmovq %xmm2, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm2
; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; ALL-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
; ALL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
; ALL-NEXT: vpextrq $1, %xmm2, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm3
; ALL-NEXT: vmovq %xmm2, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm2
; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; ALL-NEXT: vpextrq $1, %xmm0, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm3
; ALL-NEXT: vmovq %xmm0, %rax
; ALL-NEXT: popcntq %rax, %rax
; ALL-NEXT: vmovq %rax, %xmm0
; ALL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
; ALL-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; ALL-NEXT: retq
; AVX512F-LABEL: testv8i64:
; AVX512F: ## BB#0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512F-NEXT: vpand %ymm2, %ymm1, %ymm3
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
; AVX512F-NEXT: vpshufb %ymm3, %ymm4, %ymm3
; AVX512F-NEXT: vpsrlw $4, %ymm1, %ymm1
; AVX512F-NEXT: vpand %ymm2, %ymm1, %ymm1
; AVX512F-NEXT: vpshufb %ymm1, %ymm4, %ymm1
; AVX512F-NEXT: vpaddb %ymm3, %ymm1, %ymm1
; AVX512F-NEXT: vpxor %ymm3, %ymm3, %ymm3
; AVX512F-NEXT: vpsadbw %ymm3, %ymm1, %ymm1
; AVX512F-NEXT: vpand %ymm2, %ymm0, %ymm5
; AVX512F-NEXT: vpshufb %ymm5, %ymm4, %ymm5
; AVX512F-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512F-NEXT: vpand %ymm2, %ymm0, %ymm0
; AVX512F-NEXT: vpshufb %ymm0, %ymm4, %ymm0
; AVX512F-NEXT: vpaddb %ymm5, %ymm0, %ymm0
; AVX512F-NEXT: vpsadbw %ymm3, %ymm0, %ymm0
; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: testv8i64:
; AVX512BW: ## BB#0:
; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm2
; AVX512BW-NEXT: vmovdqu8 {{.*#+}} zmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
; AVX512BW-NEXT: vpshufb %zmm2, %zmm3, %zmm2
; AVX512BW-NEXT: vpsrlw $4, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpshufb %zmm0, %zmm3, %zmm0
; AVX512BW-NEXT: vpaddb %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1
; AVX512BW-NEXT: vpsadbw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%out = call <8 x i64> @llvm.ctpop.v8i64(<8 x i64> %in)
ret <8 x i64> %out
}
define <16 x i32> @testv16i32(<16 x i32> %in) nounwind {
; ALL-LABEL: testv16i32:
; ALL: ## BB#0:
; ALL-NEXT: vextracti32x4 $3, %zmm0, %xmm1
; ALL-NEXT: vpextrd $1, %xmm1, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vmovd %xmm1, %ecx
; ALL-NEXT: popcntl %ecx, %ecx
; ALL-NEXT: vmovd %ecx, %xmm2
; ALL-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2
; ALL-NEXT: vpextrd $2, %xmm1, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2
; ALL-NEXT: vpextrd $3, %xmm1, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $3, %eax, %xmm2, %xmm1
; ALL-NEXT: vextracti32x4 $2, %zmm0, %xmm2
; ALL-NEXT: vpextrd $1, %xmm2, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vmovd %xmm2, %ecx
; ALL-NEXT: popcntl %ecx, %ecx
; ALL-NEXT: vmovd %ecx, %xmm3
; ALL-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
; ALL-NEXT: vpextrd $2, %xmm2, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
; ALL-NEXT: vpextrd $3, %xmm2, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2
; ALL-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
; ALL-NEXT: vextracti32x4 $1, %zmm0, %xmm2
; ALL-NEXT: vpextrd $1, %xmm2, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vmovd %xmm2, %ecx
; ALL-NEXT: popcntl %ecx, %ecx
; ALL-NEXT: vmovd %ecx, %xmm3
; ALL-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
; ALL-NEXT: vpextrd $2, %xmm2, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
; ALL-NEXT: vpextrd $3, %xmm2, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $3, %eax, %xmm3, %xmm2
; ALL-NEXT: vpextrd $1, %xmm0, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vmovd %xmm0, %ecx
; ALL-NEXT: popcntl %ecx, %ecx
; ALL-NEXT: vmovd %ecx, %xmm3
; ALL-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3
; ALL-NEXT: vpextrd $2, %xmm0, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3
; ALL-NEXT: vpextrd $3, %xmm0, %eax
; ALL-NEXT: popcntl %eax, %eax
; ALL-NEXT: vpinsrd $3, %eax, %xmm3, %xmm0
; ALL-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; ALL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; ALL-NEXT: retq
; AVX512F-LABEL: testv16i32:
; AVX512F: ## BB#0:
; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512F-NEXT: vpand %ymm2, %ymm1, %ymm3
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
; AVX512F-NEXT: vpshufb %ymm3, %ymm4, %ymm3
; AVX512F-NEXT: vpsrlw $4, %ymm1, %ymm1
; AVX512F-NEXT: vpand %ymm2, %ymm1, %ymm1
; AVX512F-NEXT: vpshufb %ymm1, %ymm4, %ymm1
; AVX512F-NEXT: vpaddb %ymm3, %ymm1, %ymm1
; AVX512F-NEXT: vpxor %ymm3, %ymm3, %ymm3
; AVX512F-NEXT: vpunpckhdq {{.*#+}} ymm5 = ymm1[2],ymm3[2],ymm1[3],ymm3[3],ymm1[6],ymm3[6],ymm1[7],ymm3[7]
; AVX512F-NEXT: vpsadbw %ymm3, %ymm5, %ymm5
; AVX512F-NEXT: vpunpckldq {{.*#+}} ymm1 = ymm1[0],ymm3[0],ymm1[1],ymm3[1],ymm1[4],ymm3[4],ymm1[5],ymm3[5]
; AVX512F-NEXT: vpsadbw %ymm3, %ymm1, %ymm1
; AVX512F-NEXT: vpackuswb %ymm5, %ymm1, %ymm1
; AVX512F-NEXT: vpand %ymm2, %ymm0, %ymm5
; AVX512F-NEXT: vpshufb %ymm5, %ymm4, %ymm5
; AVX512F-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512F-NEXT: vpand %ymm2, %ymm0, %ymm0
; AVX512F-NEXT: vpshufb %ymm0, %ymm4, %ymm0
; AVX512F-NEXT: vpaddb %ymm5, %ymm0, %ymm0
; AVX512F-NEXT: vpunpckhdq {{.*#+}} ymm2 = ymm0[2],ymm3[2],ymm0[3],ymm3[3],ymm0[6],ymm3[6],ymm0[7],ymm3[7]
; AVX512F-NEXT: vpsadbw %ymm3, %ymm2, %ymm2
; AVX512F-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm0[0],ymm3[0],ymm0[1],ymm3[1],ymm0[4],ymm3[4],ymm0[5],ymm3[5]
; AVX512F-NEXT: vpsadbw %ymm3, %ymm0, %ymm0
; AVX512F-NEXT: vpackuswb %ymm2, %ymm0, %ymm0
; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: testv16i32:
; AVX512BW: ## BB#0:
; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm1 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm2
; AVX512BW-NEXT: vmovdqu8 {{.*#+}} zmm3 = [0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4]
; AVX512BW-NEXT: vpshufb %zmm2, %zmm3, %zmm2
; AVX512BW-NEXT: vpsrlw $4, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpshufb %zmm0, %zmm3, %zmm0
; AVX512BW-NEXT: vpaddb %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: vpxord %zmm1, %zmm1, %zmm1
; AVX512BW-NEXT: vpunpckhdq {{.*#+}} zmm2 = zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[14],zmm1[14],zmm0[15],zmm1[15]
; AVX512BW-NEXT: vpsadbw %zmm1, %zmm2, %zmm2
; AVX512BW-NEXT: vpunpckldq {{.*#+}} zmm0 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[12],zmm1[12],zmm0[13],zmm1[13]
; AVX512BW-NEXT: vpsadbw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpackuswb %zmm2, %zmm0, %zmm0
; AVX512BW-NEXT: retq
%out = call <16 x i32> @llvm.ctpop.v16i32(<16 x i32> %in)
ret <16 x i32> %out
}