forked from OSchip/llvm-project
Teach BaseIndexOffset::match to identify base pointers in loops.
The small utility function that pattern matches Base + Index + Offset patterns for loads and stores fails to recognize the base pointer for loads/stores from/into an array at offset 0 inside a loop. As a result DAGCombiner::MergeConsecutiveStores was not able to merge all stores. This commit fixes the issue by adding an additional pattern match and also a test case. Reviewer: Nadav llvm-svn: 188936
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@ -7859,17 +7859,29 @@ struct BaseIndexOffset {
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static BaseIndexOffset match(SDValue Ptr) {
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bool IsIndexSignExt = false;
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// Just Base or possibly anything else.
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// We only can pattern match BASE + INDEX + OFFSET. If Ptr is not an ADD
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// instruction, then it could be just the BASE or everything else we don't
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// know how to handle. Just use Ptr as BASE and give up.
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if (Ptr->getOpcode() != ISD::ADD)
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return BaseIndexOffset(Ptr, SDValue(), 0, IsIndexSignExt);
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// Base + offset.
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// We know that we have at least an ADD instruction. Try to pattern match
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// the simple case of BASE + OFFSET.
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if (isa<ConstantSDNode>(Ptr->getOperand(1))) {
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int64_t Offset = cast<ConstantSDNode>(Ptr->getOperand(1))->getSExtValue();
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return BaseIndexOffset(Ptr->getOperand(0), SDValue(), Offset,
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IsIndexSignExt);
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}
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// Inside a loop the current BASE pointer is calculated using an ADD and a
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// MUL insruction. In this case Ptr is the actual BASE pointer.
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// (i64 add (i64 %array_ptr)
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// (i64 mul (i64 %induction_var)
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// (i64 %element_size)))
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if (Ptr->getOperand(1)->getOpcode() == ISD::MUL) {
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return BaseIndexOffset(Ptr, SDValue(), 0, IsIndexSignExt);
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}
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// Look at Base + Index + Offset cases.
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SDValue Base = Ptr->getOperand(0);
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SDValue IndexOffset = Ptr->getOperand(1);
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@ -0,0 +1,30 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
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define void @merge_store(i32* nocapture %a) {
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; CHECK-LABEL: merge_store:
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; CHECK: movq
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; CHECK: movq
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entry:
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br label %for.body
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for.body:
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv
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store i32 1, i32* %arrayidx, align 4
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%0 = or i64 %indvars.iv, 1
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%arrayidx2 = getelementptr inbounds i32* %a, i64 %0
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store i32 1, i32* %arrayidx2, align 4
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%1 = or i64 %indvars.iv, 2
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%arrayidx5 = getelementptr inbounds i32* %a, i64 %1
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store i32 1, i32* %arrayidx5, align 4
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%2 = or i64 %indvars.iv, 3
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%arrayidx8 = getelementptr inbounds i32* %a, i64 %2
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store i32 1, i32* %arrayidx8, align 4
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
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%3 = trunc i64 %indvars.iv.next to i32
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%cmp = icmp slt i32 %3, 1000
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br i1 %cmp, label %for.body, label %for.end
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for.end:
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ret void
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}
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