forked from OSchip/llvm-project
AMDGPU/SI: Move VI SMEM pattern back into VIInstructions.td
Summary: This was accidently moved to CIInstructions.td in r256282 Reviewers: cfang, arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15763 llvm-svn: 256775
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@ -329,12 +329,6 @@ def useFlatForGlobal : Predicate <
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let Predicates = [useFlatForGlobal] in {
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// 1. Offset as 20bit DWORD immediate
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def : Pat <
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(SIload_constant v4i32:$sbase, IMM20bit:$offset),
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(S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
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>;
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// Patterns for global loads with no offset
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class FlatLoadPat <FLAT inst, SDPatternOperator node, ValueType vt> : Pat <
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(vt (node i64:$addr)),
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@ -101,3 +101,12 @@ def S_DCACHE_WB_VOL : SMEM_Inval <0x23,
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} // End SIAssemblerPredicate = DisableInst, SubtargetPredicate = isVI
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let Predicates = [isVI] in {
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// 1. Offset as 20bit DWORD immediate
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def : Pat <
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(SIload_constant v4i32:$sbase, IMM20bit:$offset),
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(S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
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>;
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} // End Predicates = [isVI]
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