forked from OSchip/llvm-project
[Hexagon] Use ArrayRef to avoid needing to calculate an array size. Interestingly the original code may have had a bug because it was passing the byte size of a uint16_t array instead of the number of entries.
llvm-svn: 254382
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8072081b63
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@ -471,12 +471,13 @@ extern const MCInstrDesc HexagonInsts[];
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}
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static DecodeStatus DecodeRegisterClass(MCInst &Inst, unsigned RegNo,
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const uint16_t Table[], size_t Size) {
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if (RegNo < Size) {
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ArrayRef<uint16_t> Table) {
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if (RegNo < Table.size()) {
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Inst.addOperand(MCOperand::createReg(Table[RegNo]));
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return MCDisassembler::Success;
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} else
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return MCDisassembler::Fail;
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}
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return MCDisassembler::Fail;
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}
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static DecodeStatus DecodeIntRegsLow8RegisterClass(MCInst &Inst, unsigned RegNo,
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@ -497,8 +498,7 @@ static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
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Hexagon::R30, Hexagon::R31};
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return (DecodeRegisterClass(Inst, RegNo, IntRegDecoderTable,
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sizeof(IntRegDecoderTable)));
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return (DecodeRegisterClass(Inst, RegNo, IntRegDecoderTable));
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}
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static DecodeStatus DecodeVectorRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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@ -513,8 +513,7 @@ static DecodeStatus DecodeVectorRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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Hexagon::V25, Hexagon::V26, Hexagon::V27, Hexagon::V28, Hexagon::V29,
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Hexagon::V30, Hexagon::V31};
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return (DecodeRegisterClass(Inst, RegNo, VecRegDecoderTable,
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sizeof(VecRegDecoderTable)));
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return (DecodeRegisterClass(Inst, RegNo, VecRegDecoderTable));
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}
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static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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@ -526,8 +525,7 @@ static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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Hexagon::D8, Hexagon::D9, Hexagon::D10, Hexagon::D11,
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Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15};
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return (DecodeRegisterClass(Inst, RegNo >> 1, DoubleRegDecoderTable,
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sizeof(DoubleRegDecoderTable)));
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return (DecodeRegisterClass(Inst, RegNo >> 1, DoubleRegDecoderTable));
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}
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static DecodeStatus DecodeVecDblRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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@ -539,8 +537,7 @@ static DecodeStatus DecodeVecDblRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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Hexagon::W8, Hexagon::W9, Hexagon::W10, Hexagon::W11,
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Hexagon::W12, Hexagon::W13, Hexagon::W14, Hexagon::W15};
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return (DecodeRegisterClass(Inst, RegNo >> 1, VecDblRegDecoderTable,
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sizeof(VecDblRegDecoderTable)));
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return (DecodeRegisterClass(Inst, RegNo >> 1, VecDblRegDecoderTable));
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}
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static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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@ -549,8 +546,7 @@ static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,
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Hexagon::P2, Hexagon::P3};
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return (DecodeRegisterClass(Inst, RegNo, PredRegDecoderTable,
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sizeof(PredRegDecoderTable)));
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return (DecodeRegisterClass(Inst, RegNo, PredRegDecoderTable));
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}
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static DecodeStatus DecodeVecPredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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@ -559,8 +555,7 @@ static DecodeStatus DecodeVecPredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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static const uint16_t VecPredRegDecoderTable[] = {Hexagon::Q0, Hexagon::Q1,
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Hexagon::Q2, Hexagon::Q3};
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return (DecodeRegisterClass(Inst, RegNo, VecPredRegDecoderTable,
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sizeof(VecPredRegDecoderTable)));
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return (DecodeRegisterClass(Inst, RegNo, VecPredRegDecoderTable));
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}
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static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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