forked from OSchip/llvm-project
MIRParser: generic register operands with types
This should fix the fallout of r283848. llvm-svn: 283850
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@ -990,7 +990,7 @@ bool MIParser::parseRegisterOperand(MachineOperand &Dest,
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// Virtual registers may have a size with GlobalISel.
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if (!TargetRegisterInfo::isVirtualRegister(Reg))
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return error("unexpected size on physical register");
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if (MRI.getRegClassOrRegBank(Reg).is<const TargetRegisterClass *>())
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if (RegInfo->Kind != VRegInfo::GENERIC)
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return error("unexpected size on non-generic virtual register");
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LLT Ty;
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@ -124,7 +124,8 @@ LLT MachineRegisterInfo::getType(unsigned VReg) const {
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void MachineRegisterInfo::setType(unsigned VReg, LLT Ty) {
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// Check that VReg doesn't have a class.
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assert(!getRegClassOrRegBank(VReg).is<const TargetRegisterClass *>() &&
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assert(getRegClassOrRegBank(VReg).isNull() ||
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!getRegClassOrRegBank(VReg).is<const TargetRegisterClass *>() &&
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"Can't set the size of a non-generic virtual register");
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getVRegToType()[VReg] = Ty;
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}
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