forked from OSchip/llvm-project
MachineModuleInfo: Store more specific reference to LLVMTargetMachine; NFC
MachineModuleInfo can only be used in code using lib/CodeGen, hence we can keep a more specific reference to LLVMTargetMachine rather than just TargetMachine around. llvm-svn: 346182
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54d23a8eb7
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3d849f67cb
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@ -46,10 +46,10 @@ namespace llvm {
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class BasicBlock;
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class CallInst;
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class Function;
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class MachineFunction;
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class LLVMTargetMachine;
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class MMIAddrLabelMap;
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class MachineFunction;
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class Module;
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class TargetMachine;
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//===----------------------------------------------------------------------===//
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/// This class can be derived from and used by targets to hold private
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@ -76,7 +76,7 @@ protected:
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/// for specific use.
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///
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class MachineModuleInfo : public ImmutablePass {
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const TargetMachine &TM;
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const LLVMTargetMachine &TM;
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/// This is the MCContext used for the entire code generator.
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MCContext Context;
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@ -145,7 +145,7 @@ class MachineModuleInfo : public ImmutablePass {
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public:
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static char ID; // Pass identification, replacement for typeid
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explicit MachineModuleInfo(const TargetMachine *TM = nullptr);
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explicit MachineModuleInfo(const LLVMTargetMachine *TM = nullptr);
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~MachineModuleInfo() override;
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// Initialization and Finalization
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@ -194,7 +194,7 @@ void MMIAddrLabelMapCallbackPtr::allUsesReplacedWith(Value *V2) {
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Map->UpdateForRAUWBlock(cast<BasicBlock>(getValPtr()), cast<BasicBlock>(V2));
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}
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MachineModuleInfo::MachineModuleInfo(const TargetMachine *TM)
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MachineModuleInfo::MachineModuleInfo(const LLVMTargetMachine *TM)
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: ImmutablePass(ID), TM(*TM),
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Context(TM->getMCAsmInfo(), TM->getMCRegisterInfo(),
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TM->getObjFileLowering(), nullptr, false) {
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@ -142,8 +142,10 @@ llvm::BitVector getFunctionReservedRegs(const llvm::TargetMachine &TM) {
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llvm::make_unique<llvm::LLVMContext>();
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std::unique_ptr<llvm::Module> Module =
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createModule(Context, TM.createDataLayout());
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// TODO: This only works for targets implementing LLVMTargetMachine.
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const LLVMTargetMachine &LLVMTM = static_cast<const LLVMTargetMachine&>(TM);
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std::unique_ptr<llvm::MachineModuleInfo> MMI =
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llvm::make_unique<llvm::MachineModuleInfo>(&TM);
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llvm::make_unique<llvm::MachineModuleInfo>(&LLVMTM);
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llvm::MachineFunction &MF =
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createVoidVoidPtrMachineFunction(FunctionID, Module.get(), MMI.get());
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// Saving reserved registers for client.
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@ -42,8 +42,9 @@ protected:
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return;
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TargetOptions Options;
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TM = std::unique_ptr<TargetMachine>(T->createTargetMachine(
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"AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
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TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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T->createTargetMachine("AArch64", "", "", Options, None, None,
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CodeGenOpt::Aggressive)));
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if (!TM)
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return;
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@ -70,7 +71,7 @@ protected:
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}
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = nullptr;
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std::unique_ptr<LLVMTargetMachine> TM;
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std::unique_ptr<Module> M;
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Function *F;
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std::unique_ptr<MachineFunction> MF;
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@ -44,7 +44,7 @@ void initLLVM() {
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/// Create a TargetMachine. As we lack a dedicated always available target for
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/// unittests, we go for "AArch64".
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std::unique_ptr<TargetMachine> createTargetMachine() {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
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Triple TargetTriple("aarch64--");
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
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@ -52,8 +52,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
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return nullptr;
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TargetOptions Options;
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return std::unique_ptr<TargetMachine>(T->createTargetMachine(
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"AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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T->createTargetMachine("AArch64", "", "", Options, None, None,
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CodeGenOpt::Aggressive)));
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}
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std::unique_ptr<Module> parseMIR(LLVMContext &Context,
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@ -79,7 +80,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
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}
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std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
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createDummyModule(LLVMContext &Context, const TargetMachine &TM,
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createDummyModule(LLVMContext &Context, const LLVMTargetMachine &TM,
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StringRef MIRFunc) {
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SmallString<512> S;
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StringRef MIRString = (Twine(R"MIR(
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@ -136,7 +137,7 @@ protected:
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B.setInsertPt(*EntryMBB, EntryMBB->end());
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}
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM;
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std::unique_ptr<LLVMTargetMachine> TM;
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MachineFunction *MF;
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std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
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ModuleMMIPair;
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@ -43,7 +43,7 @@ void initLLVM() {
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/// Create a TargetMachine. As we lack a dedicated always available target for
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/// unittests, we go for "AArch64".
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std::unique_ptr<TargetMachine> createTargetMachine() {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
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Triple TargetTriple("aarch64--");
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
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@ -51,8 +51,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
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return nullptr;
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TargetOptions Options;
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return std::unique_ptr<TargetMachine>(T->createTargetMachine(
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"AArch64", "", "", Options, None, None, CodeGenOpt::Aggressive));
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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T->createTargetMachine("AArch64", "", "", Options, None, None,
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CodeGenOpt::Aggressive)));
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}
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std::unique_ptr<Module> parseMIR(LLVMContext &Context,
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@ -78,7 +79,7 @@ std::unique_ptr<Module> parseMIR(LLVMContext &Context,
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}
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std::pair<std::unique_ptr<Module>, std::unique_ptr<MachineModuleInfo>>
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createDummyModule(LLVMContext &Context, const TargetMachine &TM,
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createDummyModule(LLVMContext &Context, const LLVMTargetMachine &TM,
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StringRef MIRFunc) {
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SmallString<512> S;
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StringRef MIRString = (Twine(R"MIR(
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@ -122,7 +123,7 @@ static void collectCopies(SmallVectorImpl<unsigned> &Copies,
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TEST(PatternMatchInstr, MatchIntConstant) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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if (!TM)
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return;
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auto ModuleMMIPair = createDummyModule(Context, *TM, "");
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@ -143,7 +144,7 @@ TEST(PatternMatchInstr, MatchIntConstant) {
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TEST(PatternMatchInstr, MatchBinaryOp) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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if (!TM)
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return;
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auto ModuleMMIPair = createDummyModule(Context, *TM, "");
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@ -270,7 +271,7 @@ TEST(PatternMatchInstr, MatchBinaryOp) {
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TEST(PatternMatchInstr, MatchFPUnaryOp) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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if (!TM)
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return;
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auto ModuleMMIPair = createDummyModule(Context, *TM, "");
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@ -341,7 +342,7 @@ TEST(PatternMatchInstr, MatchFPUnaryOp) {
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TEST(PatternMatchInstr, MatchExtendsTrunc) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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if (!TM)
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return;
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auto ModuleMMIPair = createDummyModule(Context, *TM, "");
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@ -397,7 +398,7 @@ TEST(PatternMatchInstr, MatchExtendsTrunc) {
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TEST(PatternMatchInstr, MatchSpecificType) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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if (!TM)
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return;
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auto ModuleMMIPair = createDummyModule(Context, *TM, "");
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@ -444,7 +445,7 @@ TEST(PatternMatchInstr, MatchSpecificType) {
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TEST(PatternMatchInstr, MatchCombinators) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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if (!TM)
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return;
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auto ModuleMMIPair = createDummyModule(Context, *TM, "");
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@ -35,7 +35,7 @@ void initLLVM() {
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/// Create a TargetMachine. As we lack a dedicated always available target for
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/// unittests, we go for "AMDGPU" to be able to test normal and subregister
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/// liveranges.
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std::unique_ptr<TargetMachine> createTargetMachine() {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
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Triple TargetTriple("amdgcn--");
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std::string Error;
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const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
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@ -43,13 +43,14 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
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return nullptr;
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TargetOptions Options;
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return std::unique_ptr<TargetMachine>(T->createTargetMachine(
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"AMDGPU", "", "", Options, None, None, CodeGenOpt::Aggressive));
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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T->createTargetMachine("AMDGPU", "", "", Options, None, None,
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CodeGenOpt::Aggressive)));
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}
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std::unique_ptr<Module> parseMIR(LLVMContext &Context,
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legacy::PassManagerBase &PM, std::unique_ptr<MIRParser> &MIR,
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const TargetMachine &TM, StringRef MIRCode, const char *FuncName) {
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const LLVMTargetMachine &TM, StringRef MIRCode, const char *FuncName) {
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SMDiagnostic Diagnostic;
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std::unique_ptr<MemoryBuffer> MBuffer = MemoryBuffer::getMemBuffer(MIRCode);
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MIR = createMIRParser(std::move(MBuffer), Context);
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@ -128,7 +129,7 @@ static void testHandleMove(MachineFunction &MF, LiveIntervals &LIS,
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static void liveIntervalTest(StringRef MIRFunc, LiveIntervalTest T) {
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LLVMContext Context;
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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// This test is designed for the X86 backend; stop if it is not available.
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if (!TM)
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return;
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@ -10,7 +10,7 @@
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using namespace llvm;
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namespace {
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std::unique_ptr<TargetMachine> createTargetMachine() {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
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auto TT(Triple::normalize("aarch64--"));
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std::string CPU("generic");
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std::string FS("");
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@ -22,8 +22,9 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
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std::string Error;
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const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
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return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
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TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
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CodeGenOpt::Default)));
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}
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std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
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@ -37,7 +38,7 @@ std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
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/// TODO: Some of this might be useful for other architectures as well - extract
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/// the platform-independent parts somewhere they can be reused.
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void runChecks(
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TargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
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LLVMTargetMachine *TM, AArch64InstrInfo *II, const StringRef InputIRSnippet,
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const StringRef InputMIRSnippet,
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std::function<void(AArch64InstrInfo &, MachineFunction &)> Checks) {
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LLVMContext Context;
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@ -78,7 +79,7 @@ void runChecks(
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} // anonymous namespace
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TEST(InstSizes, STACKMAP) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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@ -93,7 +94,7 @@ TEST(InstSizes, STACKMAP) {
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}
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TEST(InstSizes, PATCHPOINT) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(TM.get(), II.get(), "",
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@ -108,7 +109,7 @@ TEST(InstSizes, PATCHPOINT) {
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}
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TEST(InstSizes, TLSDESC_CALLSEQ) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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std::unique_ptr<AArch64InstrInfo> II = createInstrInfo(TM.get());
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runChecks(
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@ -22,7 +22,7 @@ using namespace llvm;
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namespace {
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std::unique_ptr<TargetMachine> createTargetMachine() {
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std::unique_ptr<LLVMTargetMachine> createTargetMachine() {
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auto TT(Triple::normalize("wasm32-unknown-unknown"));
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std::string CPU("");
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std::string FS("");
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const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error);
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assert(TheTarget);
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return std::unique_ptr<TargetMachine>(TheTarget->createTargetMachine(
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TT, CPU, FS, TargetOptions(), None, None, CodeGenOpt::Default));
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return std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine*>(
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TheTarget->createTargetMachine(TT, CPU, FS, TargetOptions(), None, None,
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CodeGenOpt::Default)));
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}
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std::unique_ptr<Module> parseMIR(LLVMContext &Context,
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} // namespace
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TEST(WebAssemblyExceptionInfoTest, TEST0) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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StringRef MIRString = R"MIR(
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}
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TEST(WebAssemblyExceptionInfoTest, TEST1) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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StringRef MIRString = R"MIR(
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// Terminate pad test
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TEST(WebAssemblyExceptionInfoTest, TEST2) {
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std::unique_ptr<TargetMachine> TM = createTargetMachine();
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std::unique_ptr<LLVMTargetMachine> TM = createTargetMachine();
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ASSERT_TRUE(TM);
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StringRef MIRString = R"MIR(
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