forked from OSchip/llvm-project
[tblgen][PredicateExpander] Add the ability to describe more complex constraints on instruction operands.
Before this patch, class PredicateExpander only knew how to expand simple predicates that performed checks on instruction operands. In particular, the new scheduling predicate syntax was not rich enough to express checks like this one: Foo(MI->getOperand(0).getImm()) == ExpectedVal; Here, the immediate operand value at index zero is passed in input to function Foo, and ExpectedVal is compared against the value returned by function Foo. While this predicate pattern doesn't show up in any X86 model, it shows up in other upstream targets. So, being able to support those predicates is fundamental if we want to be able to modernize all the scheduling models upstream. With this patch, we allow users to specify if a register/immediate operand value needs to be passed in input to a function as part of the predicate check. Now, register/immediate operand checks all derive from base class CheckOperandBase. This patch also changes where TIIPredicate definitions are expanded by the instructon info emitter. Before, definitions were expanded in class XXXGenInstrInfo (where XXX is a target name). With the introduction of this new syntax, we may want to have TIIPredicates expanded directly in XXXInstrInfo. That is because functions used by the new operand predicates may only exist in the derived class (i.e. XXXInstrInfo). This patch is a non functional change for the existing scheduling models. In future, we will be able to use this richer syntax to better describe complex scheduling predicates, and expose them to llvm-mca. Differential Revision: https://reviews.llvm.org/D53880 llvm-svn: 345714
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@ -106,28 +106,50 @@ class CheckSameRegOperand<int First, int Second> : MCInstPredicate {
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int SecondIndex = Second;
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}
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// Base class for checks on register/immediate operands.
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// It allows users to define checks like:
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// MyFunction(MI->getOperand(Index).getImm()) == Val;
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//
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// In the example above, `MyFunction` is a function that takes as input an
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// immediate operand value, and returns another value. Field `FunctionMapper` is
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// the name of the function to call on the operand value.
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class CheckOperandBase<int Index, string Fn = ""> : MCOperandPredicate<Index> {
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string FunctionMapper = Fn;
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}
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// Check that the machine register operand at position `Index` references
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// register R. This predicate assumes that we already checked that the machine
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// operand at position `Index` is a register operand.
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class CheckRegOperand<int Index, Register R> : MCOperandPredicate<Index> {
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class CheckRegOperand<int Index, Register R> : CheckOperandBase<Index> {
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Register Reg = R;
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}
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// Check if register operand at index `Index` is the invalid register.
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class CheckInvalidRegOperand<int Index> : MCOperandPredicate<Index>;
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class CheckInvalidRegOperand<int Index> : CheckOperandBase<Index>;
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// Check that the operand at position `Index` is immediate `Imm`.
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class CheckImmOperand<int Index, int Imm> : MCOperandPredicate<Index> {
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// If field `FunctionMapper` is a non-empty string, then function
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// `FunctionMapper` is applied to the operand value, and the return value is then
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// compared against `Imm`.
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class CheckImmOperand<int Index, int Imm> : CheckOperandBase<Index> {
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int ImmVal = Imm;
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}
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// Similar to CheckImmOperand, however the immediate is not a literal number.
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// This is useful when we want to compare the value of an operand against an
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// enum value, and we know the actual integer value of that enum.
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class CheckImmOperand_s<int Index, string Value> : MCOperandPredicate<Index> {
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class CheckImmOperand_s<int Index, string Value> : CheckOperandBase<Index> {
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string ImmVal = Value;
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}
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// Expands to a call to `FunctionMapper` if field `FunctionMapper` is set.
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// Otherwise, it expands to a CheckNot<CheckInvalidRegOperand<Index>>.
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class CheckRegOperandSimple<int Index> : CheckOperandBase<Index>;
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// Expands to a call to `FunctionMapper` if field `FunctionMapper` is set.
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// Otherwise, it simply evaluates to TruePred.
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class CheckImmOperandSimple<int Index> : CheckOperandBase<Index>;
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// Check that the operand at position `Index` is immediate value zero.
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class CheckZeroOperand<int Index> : CheckImmOperand<Index, 0>;
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@ -206,13 +228,13 @@ class FunctionPredicateBase<string name, MCStatement body> {
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MCStatement Body = body;
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}
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// Check that a call to method `Name` in class "XXXGenInstrInfo" (where XXX is
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// Check that a call to method `Name` in class "XXXInstrInfo" (where XXX is
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// the name of a target) returns true.
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//
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// TIIPredicate definitions are used to model calls to the target-specific
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// InstrInfo. A TIIPredicate is treated specially by the InstrInfoEmitter
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// tablegen backend, which will use it to automatically generate a definition in
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// the target specific `GenInstrInfo` class.
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// the target specific `InstrInfo` class.
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//
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// There cannot be multiple TIIPredicate definitions with the same name for the
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// same target.
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@ -7844,3 +7844,6 @@ X86InstrInfo::insertOutlinedCall(Module &M, MachineBasicBlock &MBB,
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return It;
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}
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#define GET_TII_HELPERS
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#include "X86GenInstrInfo.inc"
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@ -558,6 +558,9 @@ public:
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MachineBasicBlock::iterator &It, MachineFunction &MF,
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const outliner::Candidate &C) const override;
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#define GET_TII_HELPER_DECLS
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#include "X86GenInstrInfo.inc"
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protected:
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/// Commutes the operands in the given instruction by changing the operands
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/// order and/or changing the instruction's opcode and/or the immediate value
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@ -66,7 +66,8 @@ private:
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/// This method is used to custom expand TIIPredicate definitions.
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/// See file llvm/Target/TargetInstPredicates.td for a description of what is
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/// a TIIPredicate and how to use it.
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void emitTIIHelperMethods(raw_ostream &OS, StringRef TargetName);
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void emitTIIHelperMethods(raw_ostream &OS, StringRef TargetName,
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bool ExpandDefinition = true);
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/// Expand TIIPredicate definitions to functions that accept a const MCInst
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/// reference.
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@ -400,7 +401,8 @@ void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS,
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}
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void InstrInfoEmitter::emitTIIHelperMethods(raw_ostream &OS,
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StringRef TargetName) {
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StringRef TargetName,
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bool ExpandDefinition) {
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RecVec TIIPredicates = Records.getAllDerivedDefinitions("TIIPredicate");
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if (TIIPredicates.empty())
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return;
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@ -410,8 +412,17 @@ void InstrInfoEmitter::emitTIIHelperMethods(raw_ostream &OS,
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PE.setIndentLevel(2);
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for (const Record *Rec : TIIPredicates) {
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OS << "\n static bool " << Rec->getValueAsString("FunctionName");
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OS << "(const MachineInstr &MI) {\n";
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OS << "\n " << (ExpandDefinition ? "" : "static ") << "bool ";
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if (ExpandDefinition)
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OS << TargetName << "InstrInfo::";
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OS << Rec->getValueAsString("FunctionName");
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OS << "(const MachineInstr &MI)";
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if (!ExpandDefinition) {
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OS << ";\n";
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continue;
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}
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OS << " {\n";
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OS.indent(PE.getIndentLevel() * 2);
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PE.expandStatement(OS, Rec->getValueAsDef("Body"));
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@ -517,12 +528,21 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
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<< "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1);\n"
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<< " ~" << ClassName << "() override = default;\n";
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emitTIIHelperMethods(OS, TargetName);
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OS << "\n};\n} // end llvm namespace\n";
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OS << "#endif // GET_INSTRINFO_HEADER\n\n";
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OS << "#ifdef GET_TII_HELPER_DECLS\n";
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OS << "#undef GET_TII_HELPER_DECLS\n";
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emitTIIHelperMethods(OS, TargetName, /* ExpandDefintion = */false);
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OS << "#endif // GET_TII_HELPER_DECLS\n\n";
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OS << "#ifdef GET_TII_HELPERS\n";
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OS << "#undef GET_TII_HELPERS\n";
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emitTIIHelperMethods(OS, TargetName, /* ExpandDefintion = */true);
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OS << "#endif // GET_TTI_HELPERS\n\n";
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OS << "#ifdef GET_INSTRINFO_CTOR_DTOR\n";
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OS << "#undef GET_INSTRINFO_CTOR_DTOR\n";
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@ -20,23 +20,43 @@ void PredicateExpander::expandTrue(raw_ostream &OS) { OS << "true"; }
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void PredicateExpander::expandFalse(raw_ostream &OS) { OS << "false"; }
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void PredicateExpander::expandCheckImmOperand(raw_ostream &OS, int OpIndex,
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int ImmVal) {
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int ImmVal,
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StringRef FunctionMapper) {
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if (!FunctionMapper.empty())
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OS << FunctionMapper << "(";
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OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex
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<< ").getImm() " << (shouldNegate() ? "!= " : "== ") << ImmVal;
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<< ").getImm()";
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OS << (FunctionMapper.empty() ? " " : ") ");
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OS << (shouldNegate() ? "!= " : "== ") << ImmVal;
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}
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void PredicateExpander::expandCheckImmOperand(raw_ostream &OS, int OpIndex,
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StringRef ImmVal) {
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StringRef ImmVal,
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StringRef FunctionMapper) {
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if (!FunctionMapper.empty())
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OS << FunctionMapper << "(";
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OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex
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<< ").getImm() " << (shouldNegate() ? "!= " : "== ") << ImmVal;
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<< ").getImm()";
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OS << (FunctionMapper.empty() ? "" : ")");
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if (ImmVal.empty())
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return;
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OS << (shouldNegate() ? " != " : " == ") << ImmVal;
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}
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void PredicateExpander::expandCheckRegOperand(raw_ostream &OS, int OpIndex,
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const Record *Reg) {
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const Record *Reg,
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StringRef FunctionMapper) {
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assert(Reg->isSubClassOf("Register") && "Expected a register Record!");
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if (!FunctionMapper.empty())
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OS << FunctionMapper << "(";
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OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex
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<< ").getReg() " << (shouldNegate() ? "!= " : "== ");
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<< ").getReg()";
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OS << (FunctionMapper.empty() ? "" : ")");
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if (!Reg)
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return;
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OS << (shouldNegate() ? " != " : " == ");
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const StringRef Str = Reg->getValueAsString("Namespace");
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if (!Str.empty())
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OS << Str << "::";
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void PredicateExpander::expandTIIFunctionCall(raw_ostream &OS,
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StringRef MethodName) {
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OS << (shouldNegate() ? "!" : "");
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OS << TargetName << (shouldExpandForMC() ? "_MC::" : "GenInstrInfo::");
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OS << TargetName << (shouldExpandForMC() ? "_MC::" : "InstrInfo::");
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OS << MethodName << (isByRef() ? "(MI)" : "(*MI)");
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}
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@ -266,18 +286,30 @@ void PredicateExpander::expandPredicate(raw_ostream &OS, const Record *Rec) {
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if (Rec->isSubClassOf("CheckRegOperand"))
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return expandCheckRegOperand(OS, Rec->getValueAsInt("OpIndex"),
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Rec->getValueAsDef("Reg"));
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Rec->getValueAsDef("Reg"),
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Rec->getValueAsString("FunctionMapper"));
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if (Rec->isSubClassOf("CheckRegOperandSimple"))
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return expandCheckRegOperand(OS, Rec->getValueAsInt("OpIndex"),
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nullptr,
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Rec->getValueAsString("FunctionMapper"));
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if (Rec->isSubClassOf("CheckInvalidRegOperand"))
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return expandCheckInvalidRegOperand(OS, Rec->getValueAsInt("OpIndex"));
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if (Rec->isSubClassOf("CheckImmOperand"))
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return expandCheckImmOperand(OS, Rec->getValueAsInt("OpIndex"),
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Rec->getValueAsInt("ImmVal"));
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Rec->getValueAsInt("ImmVal"),
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Rec->getValueAsString("FunctionMapper"));
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if (Rec->isSubClassOf("CheckImmOperand_s"))
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return expandCheckImmOperand(OS, Rec->getValueAsInt("OpIndex"),
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Rec->getValueAsString("ImmVal"));
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Rec->getValueAsString("ImmVal"),
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Rec->getValueAsString("FunctionMapper"));
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if (Rec->isSubClassOf("CheckImmOperandSimple"))
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return expandCheckImmOperand(OS, Rec->getValueAsInt("OpIndex"), "",
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Rec->getValueAsString("FunctionMapper"));
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if (Rec->isSubClassOf("CheckSameRegOperand"))
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return expandCheckSameRegOperand(OS, Rec->getValueAsInt("FirstIndex"),
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@ -56,9 +56,16 @@ public:
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using RecVec = std::vector<Record *>;
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void expandTrue(raw_ostream &OS);
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void expandFalse(raw_ostream &OS);
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void expandCheckImmOperand(raw_ostream &OS, int OpIndex, int ImmVal);
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void expandCheckImmOperand(raw_ostream &OS, int OpIndex, StringRef ImmVal);
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void expandCheckRegOperand(raw_ostream &OS, int OpIndex, const Record *Reg);
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void expandCheckImmOperand(raw_ostream &OS, int OpIndex, int ImmVal,
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StringRef FunctionMapper);
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void expandCheckImmOperand(raw_ostream &OS, int OpIndex, StringRef ImmVal,
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StringRef FunctionMapperer);
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void expandCheckImmOperandSimple(raw_ostream &OS, int OpIndex,
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StringRef FunctionMapper);
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void expandCheckRegOperand(raw_ostream &OS, int OpIndex, const Record *Reg,
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StringRef FunctionMapper);
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void expandCheckRegOperandSimple(raw_ostream &OS, int OpIndex,
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StringRef FunctionMapper);
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void expandCheckSameRegOperand(raw_ostream &OS, int First, int Second);
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void expandCheckNumOperands(raw_ostream &OS, int NumOps);
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void expandCheckOpcode(raw_ostream &OS, const Record *Inst);
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