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Fix some spello's pointed out by Gabor Greif 

llvm-svn: 24019
This commit is contained in:
Chris Lattner 2005-10-26 18:41:41 +00:00
parent 75eab3ca63
commit 3c7974aade
2 changed files with 4 additions and 4 deletions
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4
llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
View File

@ -637,7 +637,7 @@ void LiveIntervals::computeIntervals()
/// number. If all of the places that IntA and IntB overlap are defined by
/// copies from IntA to IntB, we know that these two ranges can really be
/// merged if we adjust the value numbers. If it is safe, adjust the value
/// numbers and return true, allowing coallescing to occur.
/// numbers and return true, allowing coalescing to occur.
bool LiveIntervals::
AdjustIfAllOverlappingRangesAreCopiesFrom(LiveInterval &IntA,
LiveInterval &IntB,
@ -729,7 +729,7 @@ void LiveIntervals::joinIntervalsInMachineBB(MachineBasicBlock *MBB) {
// If DestInt is actually a copy from SrcInt (which we know) that is used
// to define another value of SrcInt, we can change the other range of
// SrcInt to be the value of the range that defines DestInt, allowing a
// coallesce.
// coalesce.
if (!Joinable && DestInt.containsOneValue() &&
AdjustIfAllOverlappingRangesAreCopiesFrom(SrcInt, DestInt, MIDefIdx))
Joinable = true;

4
llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -46,7 +46,7 @@ namespace {
Statistic<> NumTwoAddressInstrs("twoaddressinstruction",
"Number of two-address instructions");
Statistic<> NumCommuted("twoaddressinstruction",
"Number of instructions commuted to coallesce");
"Number of instructions commuted to coalesce");
Statistic<> NumConvertedTo3Addr("twoaddressinstruction",
"Number of instructions promoted to 3-address");
@ -127,7 +127,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
// If this instruction is not the killing user of B, see if we can
// rearrange the code to make it so. Making it the killing user will
// allow us to coallesce A and B together, eliminating the copy we are
// allow us to coalesce A and B together, eliminating the copy we are
// about to insert.
if (!LV.KillsRegister(mi, regB)) {
const TargetInstrDescriptor &TID = TII.get(opcode);