maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Enforce stricter rules in machine code verifier. 

Implicit operands no longer get a free pass: Imp-use requires a live register
and imp-def requires a dead register.

There is also no special rule allowing redefinition of a sub-register when the
super-register is live. The super register must have imp-kill+imp-def operands
instead.

llvm-svn: 78090
This commit is contained in:
Jakob Stoklund Olesen 2009-08-04 19:18:01 +00:00
parent d302ab9961
commit 3c2a1dea71
1 changed files with 15 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
llvm/lib/CodeGen/MachineVerifier.cpp
View File

@ -88,14 +88,6 @@ namespace {
RV.push_back(*R); RV.push_back(*R);
} }
// Does RS contain any super-registers of Reg?
bool anySuperRegisters(const RegSet &RS, unsigned Reg) {
for (const unsigned *R = TRI->getSuperRegisters(Reg); *R; R++)
if (RS.count(*R))
return true;
return false;
}
struct BBInfo { struct BBInfo {
// Is this MBB reachable from the MF entry point? // Is this MBB reachable from the MF entry point?
bool reachable; bool reachable;
@ -151,7 +143,7 @@ namespace {
DenseMap<const MachineBasicBlock*, BBInfo> MBBInfoMap; DenseMap<const MachineBasicBlock*, BBInfo> MBBInfoMap;
bool isReserved(unsigned Reg) { bool isReserved(unsigned Reg) {
return Reg < regsReserved.size() && regsReserved[Reg]; return Reg < regsReserved.size() && regsReserved.test(Reg);
} }
void visitMachineFunctionBefore(); void visitMachineFunctionBefore();
@ -287,6 +279,16 @@ void
MachineVerifier::visitMachineFunctionBefore() MachineVerifier::visitMachineFunctionBefore()
{ {
regsReserved = TRI->getReservedRegs(*MF); regsReserved = TRI->getReservedRegs(*MF);
// A sub-register of a reserved register is also reserved
for (int Reg = regsReserved.find_first(); Reg>=0;
Reg = regsReserved.find_next(Reg)) {
for (const unsigned *Sub = TRI->getSubRegisters(Reg); *Sub; ++Sub) {
// FIXME: This should probably be:
// assert(regsReserved.test(*Sub) && "Non-reserved sub-register");
regsReserved.set(*Sub);
}
}
markReachable(&MF->front()); markReachable(&MF->front());
} }
@ -364,9 +366,8 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
MI->getOperand(defIdx).getReg() == Reg) MI->getOperand(defIdx).getReg() == Reg)
addRegWithSubRegs(regsKilled, Reg); addRegWithSubRegs(regsKilled, Reg);
} }
// Explicit use of a dead register. // Use of a dead register. A register use marked <undef> is OK.
// A register use marked <undef> is OK. if (!MO->isUndef() && !regsLive.count(Reg)) {
if (!MO->isImplicit() && !MO->isUndef() && !regsLive.count(Reg)) {
if (TargetRegisterInfo::isPhysicalRegister(Reg)) { if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
// Reserved registers may be used even when 'dead'. // Reserved registers may be used even when 'dead'.
if (!isReserved(Reg)) if (!isReserved(Reg))
@ -385,10 +386,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
} else { } else {
// Register defined. // Register defined.
// TODO: verify that earlyclobber ops are not used. // TODO: verify that earlyclobber ops are not used.
if (MO->isImplicit()) addRegWithSubRegs(regsDefined, Reg);
addRegWithSubRegs(regsImpDefined, Reg);
else
addRegWithSubRegs(regsDefined, Reg);
if (MO->isDead()) if (MO->isDead())
addRegWithSubRegs(regsDead, Reg); addRegWithSubRegs(regsDead, Reg);
@ -462,10 +460,7 @@ MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI)
E = regsDefined.end(); I != E; ++I) { E = regsDefined.end(); I != E; ++I) {
if (regsLive.count(*I)) { if (regsLive.count(*I)) {
if (TargetRegisterInfo::isPhysicalRegister(*I)) { if (TargetRegisterInfo::isPhysicalRegister(*I)) {
// We allow double defines to physical registers with live if (!allowPhysDoubleDefs && !isReserved(*I)) {
// super-registers.
if (!allowPhysDoubleDefs && !isReserved(*I) &&
!anySuperRegisters(regsLive, *I)) {
report("Redefining a live physical register", MI); report("Redefining a live physical register", MI);
*OS << "Register " << TRI->getName(*I) *OS << "Register " << TRI->getName(*I)
<< " was defined but already live.\n"; << " was defined but already live.\n";