forked from OSchip/llvm-project
Enforce stricter rules in machine code verifier.
Implicit operands no longer get a free pass: Imp-use requires a live register and imp-def requires a dead register. There is also no special rule allowing redefinition of a sub-register when the super-register is live. The super register must have imp-kill+imp-def operands instead. llvm-svn: 78090
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@ -88,14 +88,6 @@ namespace {
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RV.push_back(*R);
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}
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// Does RS contain any super-registers of Reg?
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bool anySuperRegisters(const RegSet &RS, unsigned Reg) {
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for (const unsigned *R = TRI->getSuperRegisters(Reg); *R; R++)
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if (RS.count(*R))
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return true;
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return false;
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}
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struct BBInfo {
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// Is this MBB reachable from the MF entry point?
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bool reachable;
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@ -151,7 +143,7 @@ namespace {
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DenseMap<const MachineBasicBlock*, BBInfo> MBBInfoMap;
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bool isReserved(unsigned Reg) {
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return Reg < regsReserved.size() && regsReserved[Reg];
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return Reg < regsReserved.size() && regsReserved.test(Reg);
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}
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void visitMachineFunctionBefore();
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@ -287,6 +279,16 @@ void
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MachineVerifier::visitMachineFunctionBefore()
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{
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regsReserved = TRI->getReservedRegs(*MF);
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// A sub-register of a reserved register is also reserved
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for (int Reg = regsReserved.find_first(); Reg>=0;
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Reg = regsReserved.find_next(Reg)) {
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for (const unsigned *Sub = TRI->getSubRegisters(Reg); *Sub; ++Sub) {
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// FIXME: This should probably be:
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// assert(regsReserved.test(*Sub) && "Non-reserved sub-register");
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regsReserved.set(*Sub);
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}
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}
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markReachable(&MF->front());
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}
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@ -364,9 +366,8 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
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MI->getOperand(defIdx).getReg() == Reg)
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addRegWithSubRegs(regsKilled, Reg);
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}
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// Explicit use of a dead register.
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// A register use marked <undef> is OK.
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if (!MO->isImplicit() && !MO->isUndef() && !regsLive.count(Reg)) {
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// Use of a dead register. A register use marked <undef> is OK.
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if (!MO->isUndef() && !regsLive.count(Reg)) {
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if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
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// Reserved registers may be used even when 'dead'.
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if (!isReserved(Reg))
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@ -385,10 +386,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
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} else {
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// Register defined.
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// TODO: verify that earlyclobber ops are not used.
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if (MO->isImplicit())
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addRegWithSubRegs(regsImpDefined, Reg);
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else
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addRegWithSubRegs(regsDefined, Reg);
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addRegWithSubRegs(regsDefined, Reg);
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if (MO->isDead())
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addRegWithSubRegs(regsDead, Reg);
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@ -462,10 +460,7 @@ MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI)
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E = regsDefined.end(); I != E; ++I) {
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if (regsLive.count(*I)) {
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if (TargetRegisterInfo::isPhysicalRegister(*I)) {
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// We allow double defines to physical registers with live
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// super-registers.
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if (!allowPhysDoubleDefs && !isReserved(*I) &&
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!anySuperRegisters(regsLive, *I)) {
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if (!allowPhysDoubleDefs && !isReserved(*I)) {
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report("Redefining a live physical register", MI);
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*OS << "Register " << TRI->getName(*I)
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<< " was defined but already live.\n";
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