forked from OSchip/llvm-project
GlobalISel: factor common code from translateCall and translateInvoke. NFC.
llvm-svn: 368166
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d52bc482a5
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3c10f346dc
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@ -243,6 +243,10 @@ private:
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bool valueIsSplit(const Value &V,
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SmallVectorImpl<uint64_t> *Offsets = nullptr);
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/// Common code for translating normal calls or invokes.
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bool translateCallSite(const ImmutableCallSite &CS,
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MachineIRBuilder &MIRBuilder);
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/// Translate call instruction.
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/// \pre \p U is a call instruction.
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bool translateCall(const User &U, MachineIRBuilder &MIRBuilder);
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@ -1544,6 +1544,37 @@ bool IRTranslator::translateInlineAsm(const CallInst &CI,
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return true;
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}
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bool IRTranslator::translateCallSite(const ImmutableCallSite &CS,
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MachineIRBuilder &MIRBuilder) {
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const Instruction &I = *CS.getInstruction();
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ArrayRef<Register> Res = getOrCreateVRegs(I);
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SmallVector<ArrayRef<Register>, 8> Args;
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Register SwiftInVReg = 0;
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Register SwiftErrorVReg = 0;
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for (auto &Arg : CS.args()) {
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if (CLI->supportSwiftError() && isSwiftError(Arg)) {
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assert(SwiftInVReg == 0 && "Expected only one swift error argument");
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LLT Ty = getLLTForType(*Arg->getType(), *DL);
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SwiftInVReg = MRI->createGenericVirtualRegister(Ty);
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MIRBuilder.buildCopy(SwiftInVReg, SwiftError.getOrCreateVRegUseAt(
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&I, &MIRBuilder.getMBB(), Arg));
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Args.emplace_back(makeArrayRef(SwiftInVReg));
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SwiftErrorVReg =
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SwiftError.getOrCreateVRegDefAt(&I, &MIRBuilder.getMBB(), Arg);
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continue;
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}
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Args.push_back(getOrCreateVRegs(*Arg));
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}
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MF->getFrameInfo().setHasCalls(true);
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bool Success =
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CLI->lowerCall(MIRBuilder, CS, Res, Args, SwiftErrorVReg,
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[&]() { return getOrCreateVReg(*CS.getCalledValue()); });
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return Success;
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}
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bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
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const CallInst &CI = cast<CallInst>(U);
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auto TII = MF->getTarget().getIntrinsicInfo();
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@ -1563,34 +1594,8 @@ bool IRTranslator::translateCall(const User &U, MachineIRBuilder &MIRBuilder) {
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ID = static_cast<Intrinsic::ID>(TII->getIntrinsicID(F));
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}
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if (!F || !F->isIntrinsic() || ID == Intrinsic::not_intrinsic) {
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ArrayRef<Register> Res = getOrCreateVRegs(CI);
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SmallVector<ArrayRef<Register>, 8> Args;
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Register SwiftInVReg = 0;
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Register SwiftErrorVReg = 0;
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for (auto &Arg: CI.arg_operands()) {
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if (CLI->supportSwiftError() && isSwiftError(Arg)) {
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assert(SwiftInVReg == 0 && "Expected only one swift error argument");
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LLT Ty = getLLTForType(*Arg->getType(), *DL);
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SwiftInVReg = MRI->createGenericVirtualRegister(Ty);
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MIRBuilder.buildCopy(SwiftInVReg, SwiftError.getOrCreateVRegUseAt(
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&CI, &MIRBuilder.getMBB(), Arg));
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Args.emplace_back(makeArrayRef(SwiftInVReg));
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SwiftErrorVReg =
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SwiftError.getOrCreateVRegDefAt(&CI, &MIRBuilder.getMBB(), Arg);
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continue;
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}
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Args.push_back(getOrCreateVRegs(*Arg));
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}
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MF->getFrameInfo().setHasCalls(true);
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bool Success =
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CLI->lowerCall(MIRBuilder, &CI, Res, Args, SwiftErrorVReg,
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[&]() { return getOrCreateVReg(*CI.getCalledValue()); });
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return Success;
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}
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if (!F || !F->isIntrinsic() || ID == Intrinsic::not_intrinsic)
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return translateCallSite(&CI, MIRBuilder);
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assert(ID != Intrinsic::not_intrinsic && "unknown intrinsic");
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@ -1666,30 +1671,7 @@ bool IRTranslator::translateInvoke(const User &U,
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MCSymbol *BeginSymbol = Context.createTempSymbol();
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MIRBuilder.buildInstr(TargetOpcode::EH_LABEL).addSym(BeginSymbol);
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ArrayRef<Register> Res;
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if (!I.getType()->isVoidTy())
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Res = getOrCreateVRegs(I);
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SmallVector<ArrayRef<Register>, 8> Args;
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Register SwiftErrorVReg = 0;
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Register SwiftInVReg = 0;
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for (auto &Arg : I.arg_operands()) {
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if (CLI->supportSwiftError() && isSwiftError(Arg)) {
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assert(SwiftInVReg == 0 && "Expected only one swift error argument");
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LLT Ty = getLLTForType(*Arg->getType(), *DL);
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SwiftInVReg = MRI->createGenericVirtualRegister(Ty);
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MIRBuilder.buildCopy(SwiftInVReg, SwiftError.getOrCreateVRegUseAt(
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&I, &MIRBuilder.getMBB(), Arg));
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Args.push_back(makeArrayRef(SwiftInVReg));
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SwiftErrorVReg =
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SwiftError.getOrCreateVRegDefAt(&I, &MIRBuilder.getMBB(), Arg);
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continue;
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}
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Args.push_back(getOrCreateVRegs(*Arg));
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}
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if (!CLI->lowerCall(MIRBuilder, &I, Res, Args, SwiftErrorVReg,
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[&]() { return getOrCreateVReg(*I.getCalledValue()); }))
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if (!translateCallSite(&I, MIRBuilder))
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return false;
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MCSymbol *EndSymbol = Context.createTempSymbol();
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