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[AMDGPU] Fix regressions on mesa/clover with libclc due to address space 

Currently AMDGPUTargetInfo does not initialize AddrSpaceMap in constructor, which causes regressions in mesa/clover with libclc.

This patch fixes that.

Differential Revision: https://reviews.llvm.org/D34987

llvm-svn: 307105
This commit is contained in:
Yaxun Liu 2017-07-04 19:57:18 +00:00
parent 2eef475ad3
commit 3ba4a720ad
2 changed files with 21 additions and 11 deletions
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30
clang/lib/Basic/Targets.cpp
View File

@ -2049,7 +2049,7 @@ ArrayRef<const char *> NVPTXTargetInfo::getGCCRegNames() const {
return llvm::makeArrayRef(GCCRegNames);
}
static const LangAS::Map AMDGPUNonOpenCLPrivateIsZeroMap = {
static const LangAS::Map AMDGPUPrivIsZeroDefIsGenMap = {
4, // Default
1, // opencl_global
3, // opencl_local
@ -2059,7 +2059,7 @@ static const LangAS::Map AMDGPUNonOpenCLPrivateIsZeroMap = {
2, // cuda_constant
3 // cuda_shared
};
static const LangAS::Map AMDGPUNonOpenCLGenericIsZeroMap = {
static const LangAS::Map AMDGPUGenIsZeroDefIsGenMap = {
0, // Default
1, // opencl_global
3, // opencl_local
@ -2069,7 +2069,7 @@ static const LangAS::Map AMDGPUNonOpenCLGenericIsZeroMap = {
2, // cuda_constant
3 // cuda_shared
};
static const LangAS::Map AMDGPUOpenCLPrivateIsZeroMap = {
static const LangAS::Map AMDGPUPrivIsZeroDefIsPrivMap = {
0, // Default
1, // opencl_global
3, // opencl_local
@ -2079,7 +2079,7 @@ static const LangAS::Map AMDGPUOpenCLPrivateIsZeroMap = {
2, // cuda_constant
3 // cuda_shared
};
static const LangAS::Map AMDGPUOpenCLGenericIsZeroMap = {
static const LangAS::Map AMDGPUGenIsZeroDefIsPrivMap = {
5, // Default
1, // opencl_global
3, // opencl_local
@ -2184,18 +2184,26 @@ public:
: DataLayoutStringR600);
assert(DataLayout->getAllocaAddrSpace() == AS.Private);
setAddressSpaceMap(Triple.getOS() == llvm::Triple::Mesa3D ||
Triple.getEnvironment() == llvm::Triple::OpenCL ||
Triple.getEnvironmentName() == "amdgizcl" ||
!isAMDGCN(Triple));
UseAddrSpaceMapMangling = true;
}
void setAddressSpaceMap(bool DefaultIsPrivate) {
if (isGenericZero(getTriple())) {
AddrSpaceMap = DefaultIsPrivate ? &AMDGPUGenIsZeroDefIsPrivMap
: &AMDGPUGenIsZeroDefIsGenMap;
} else {
AddrSpaceMap = DefaultIsPrivate ? &AMDGPUPrivIsZeroDefIsPrivMap
: &AMDGPUPrivIsZeroDefIsGenMap;
}
}
void adjust(LangOptions &Opts) override {
TargetInfo::adjust(Opts);
if (isGenericZero(getTriple())) {
AddrSpaceMap = Opts.OpenCL ? &AMDGPUOpenCLGenericIsZeroMap
: &AMDGPUNonOpenCLGenericIsZeroMap;
} else {
AddrSpaceMap = Opts.OpenCL ? &AMDGPUOpenCLPrivateIsZeroMap
: &AMDGPUNonOpenCLPrivateIsZeroMap;
}
setAddressSpaceMap(Opts.OpenCL || !isAMDGCN(getTriple()));
}
uint64_t getPointerWidthV(unsigned AddrSpace) const override {

2
clang/test/CodeGenOpenCL/address-spaces.cl
View File

@ -4,6 +4,8 @@
// RUN: %clang_cc1 %s -O0 -triple amdgcn-amd-amdhsa-opencl -DCL20 -cl-std=CL2.0 -emit-llvm -o - | FileCheck %s --check-prefixes=CL20,CL20SPIR
// RUN: %clang_cc1 %s -O0 -triple amdgcn-amd-amdhsa-amdgizcl -emit-llvm -o - | FileCheck %s -check-prefixes=CHECK,GIZ
// RUN: %clang_cc1 %s -O0 -triple amdgcn-amd-amdhsa-amdgizcl -DCL20 -cl-std=CL2.0 -emit-llvm -o - | FileCheck %s --check-prefixes=CL20,CL20GIZ
// RUN: %clang_cc1 %s -O0 -triple amdgcn-mesa-mesa3d -emit-llvm -o - | FileCheck --check-prefixes=CHECK,SPIR %s
// RUN: %clang_cc1 %s -O0 -triple r600-- -emit-llvm -o - | FileCheck --check-prefixes=CHECK,SPIR %s
// SPIR: i32* %arg
// GIZ: i32 addrspace(5)* %arg