forked from OSchip/llvm-project
Modified VNInfo. The "copy" member is now a union which holds the copy for a register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg.
llvm-svn: 78620
This commit is contained in:
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9d26c85bdc
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3b90d973b0
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@ -61,6 +61,10 @@ namespace llvm {
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};
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unsigned char flags;
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union {
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MachineInstr *copy;
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unsigned reg;
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} cr;
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public:
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/// Holds information about individual kills.
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@ -83,27 +87,53 @@ namespace llvm {
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/// The index of the defining instruction (if isDefAccurate() returns true).
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unsigned def;
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MachineInstr *copy;
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KillSet kills;
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VNInfo()
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: flags(IS_UNUSED), id(~1U), def(0), copy(0) {}
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: flags(IS_UNUSED), id(~1U), def(0) { cr.copy = 0; }
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/// VNInfo constructor.
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/// d is presumed to point to the actual defining instr. If it doesn't
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/// setIsDefAccurate(false) should be called after construction.
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VNInfo(unsigned i, unsigned d, MachineInstr *c)
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: flags(IS_DEF_ACCURATE), id(i), def(d), copy(c) {}
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: flags(IS_DEF_ACCURATE), id(i), def(d) { cr.copy = c; }
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/// VNInfo construtor, copies values from orig, except for the value number.
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VNInfo(unsigned i, const VNInfo &orig)
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: flags(orig.flags), id(i), def(orig.def), copy(orig.copy),
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kills(orig.kills) {}
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: flags(orig.flags), cr(orig.cr), id(i), def(orig.def), kills(orig.kills)
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{ }
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/// Copy from the parameter into this VNInfo.
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void copyFrom(VNInfo &src) {
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flags = src.flags;
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cr = src.cr;
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def = src.def;
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kills = src.kills;
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}
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/// Used for copying value number info.
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unsigned getFlags() const { return flags; }
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void setFlags(unsigned flags) { this->flags = flags; }
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/// For a register interval, if this VN was definied by a copy instr
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/// getCopy() returns a pointer to it, otherwise returns 0.
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/// For a stack interval the behaviour of this method is undefined.
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MachineInstr* getCopy() const { return cr.copy; }
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/// For a register interval, set the copy member.
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/// This method should not be called on stack intervals as it may lead to
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/// undefined behavior.
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void setCopy(MachineInstr *c) { cr.copy = c; }
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/// For a stack interval, returns the reg which this stack interval was
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/// defined from.
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/// For a register interval the behaviour of this method is undefined.
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unsigned getReg() const { return cr.reg; }
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/// For a stack interval, set the defining register.
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/// This method should not be called on register intervals as it may lead
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/// to undefined behaviour.
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void setReg(unsigned reg) { cr.reg = reg; }
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/// Returns true if one or more kills are PHI nodes.
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bool hasPHIKill() const { return flags & HAS_PHI_KILL; }
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void setHasPHIKill(bool hasKill) {
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@ -122,7 +152,7 @@ namespace llvm {
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else
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flags &= ~REDEF_BY_EC;
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}
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/// Returns true if this value is defined by a PHI instruction (or was,
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/// PHI instrucions may have been eliminated).
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bool isPHIDef() const { return flags & IS_PHI_DEF; }
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@ -317,15 +347,6 @@ namespace llvm {
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inline const VNInfo *getValNumInfo(unsigned ValNo) const {
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return valnos[ValNo];
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}
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/// copyValNumInfo - Copy the value number info for one value number to
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/// another.
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void copyValNumInfo(VNInfo *DstValNo, const VNInfo *SrcValNo) {
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DstValNo->def = SrcValNo->def;
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DstValNo->copy = SrcValNo->copy;
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DstValNo->setFlags(SrcValNo->getFlags());
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DstValNo->kills = SrcValNo->kills;
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}
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/// getNextValue - Create a new value number and return it. MIIdx specifies
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/// the instruction that defines the value number.
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@ -712,7 +712,7 @@ VNInfo* LiveInterval::MergeValueNumberInto(VNInfo *V1, VNInfo *V2) {
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// Make sure V2 is smaller than V1.
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if (V1->id < V2->id) {
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copyValNumInfo(V1, V2);
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V1->copyFrom(*V2);
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std::swap(V1, V2);
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}
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@ -740,14 +740,14 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// The new value number (#1) is defined by the instruction we claimed
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// defined value #0.
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VNInfo *ValNo = interval.getNextValue(OldValNo->def, OldValNo->copy,
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VNInfo *ValNo = interval.getNextValue(OldValNo->def, OldValNo->getCopy(),
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false, // update at *
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VNInfoAllocator);
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ValNo->setFlags(OldValNo->getFlags()); // * <- updating here
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// Value#0 is now defined by the 2-addr instruction.
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OldValNo->def = RedefIndex;
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OldValNo->copy = 0;
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OldValNo->setCopy(0);
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if (MO.isEarlyClobber())
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OldValNo->setHasRedefByEC(true);
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@ -1129,21 +1129,21 @@ LiveInterval* LiveIntervals::dupInterval(LiveInterval *li) {
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/// getVNInfoSourceReg - Helper function that parses the specified VNInfo
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/// copy field and returns the source register that defines it.
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unsigned LiveIntervals::getVNInfoSourceReg(const VNInfo *VNI) const {
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if (!VNI->copy)
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if (!VNI->getCopy())
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return 0;
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if (VNI->copy->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
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if (VNI->getCopy()->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) {
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// If it's extracting out of a physical register, return the sub-register.
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unsigned Reg = VNI->copy->getOperand(1).getReg();
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unsigned Reg = VNI->getCopy()->getOperand(1).getReg();
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if (TargetRegisterInfo::isPhysicalRegister(Reg))
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Reg = tri_->getSubReg(Reg, VNI->copy->getOperand(2).getImm());
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Reg = tri_->getSubReg(Reg, VNI->getCopy()->getOperand(2).getImm());
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return Reg;
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} else if (VNI->copy->getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
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VNI->copy->getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
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return VNI->copy->getOperand(2).getReg();
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} else if (VNI->getCopy()->getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
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VNI->getCopy()->getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
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return VNI->getCopy()->getOperand(2).getReg();
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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if (tii_->isMoveInstr(*VNI->copy, SrcReg, DstReg, SrcSubReg, DstSubReg))
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if (tii_->isMoveInstr(*VNI->getCopy(), SrcReg, DstReg, SrcSubReg, DstSubReg))
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return SrcReg;
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llvm_unreachable("Unrecognized copy instruction!");
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return 0;
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@ -741,7 +741,7 @@ void PreAllocSplitting::ReconstructLiveInterval(LiveInterval* LI) {
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unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
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if (TII->isMoveInstr(*DI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
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if (DstReg == LI->reg)
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NewVN->copy = &*DI;
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NewVN->setCopy(&*DI);
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NewVNs[&*DI] = NewVN;
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}
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@ -447,7 +447,7 @@ PBQPRegAlloc::CoalesceMap PBQPRegAlloc::findCoalesces() {
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vniItr != vniEnd; ++vniItr) {
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// We want to make sure we skip the copy instruction itself.
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if ((*vniItr)->copy == instr)
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if ((*vniItr)->getCopy() == instr)
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continue;
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if (srcLI->liveAt((*vniItr)->def)) {
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@ -689,7 +689,7 @@ bool PBQPRegAlloc::mapPBQPToRegAlloc(const PBQP::Solution &solution) {
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// Clear the existing allocation.
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vrm->clearAllVirt();
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// Iterate over the nodes mapping the PBQP solution to a register assignment.
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for (unsigned node = 0; node < node2LI.size(); ++node) {
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unsigned virtReg = node2LI[node]->reg,
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@ -119,7 +119,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
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// Get the location that B is defined at. Two options: either this value has
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// an unknown definition point or it is defined at CopyIdx. If unknown, we
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// can't process it.
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if (!BValNo->copy) return false;
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if (!BValNo->getCopy()) return false;
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assert(BValNo->def == CopyIdx && "Copy doesn't define the value?");
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// AValNo is the value number in A that defines the copy, A3 in the example.
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@ -194,7 +194,7 @@ bool SimpleRegisterCoalescing::AdjustCopiesBackFrom(LiveInterval &IntA,
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// that defines this value #'. Update the the valnum with the new defining
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// instruction #.
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BValNo->def = FillerStart;
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BValNo->copy = NULL;
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BValNo->setCopy(0);
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// Okay, we can merge them. We need to insert a new liverange:
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// [ValLR.end, BLR.begin) of either value number, then we merge the
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@ -307,7 +307,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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// Get the location that B is defined at. Two options: either this value has
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// an unknown definition point or it is defined at CopyIdx. If unknown, we
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// can't process it.
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if (!BValNo->copy) return false;
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if (!BValNo->getCopy()) return false;
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assert(BValNo->def == CopyIdx && "Copy doesn't define the value?");
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// AValNo is the value number in A that defines the copy, A3 in the example.
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@ -463,7 +463,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
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// is updated. Kills are also updated.
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VNInfo *ValNo = BValNo;
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ValNo->def = AValNo->def;
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ValNo->copy = NULL;
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ValNo->setCopy(0);
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for (unsigned j = 0, ee = ValNo->kills.size(); j != ee; ++j) {
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unsigned Kill = ValNo->kills[j].killIdx;
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if (Kill != BLR->end)
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@ -637,15 +637,15 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt,
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unsigned DefIdx = li_->getDefIndex(CopyIdx);
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const LiveRange *DLR= li_->getInterval(DstReg).getLiveRangeContaining(DefIdx);
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DLR->valno->copy = NULL;
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DLR->valno->setCopy(0);
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// Don't forget to update sub-register intervals.
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if (TargetRegisterInfo::isPhysicalRegister(DstReg)) {
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for (const unsigned* SR = tri_->getSubRegisters(DstReg); *SR; ++SR) {
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if (!li_->hasInterval(*SR))
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continue;
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DLR = li_->getInterval(*SR).getLiveRangeContaining(DefIdx);
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if (DLR && DLR->valno->copy == CopyMI)
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DLR->valno->copy = NULL;
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if (DLR && DLR->valno->getCopy() == CopyMI)
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DLR->valno->setCopy(0);
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}
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}
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@ -682,8 +682,8 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt,
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if (MO.isDef() && li_->hasInterval(MO.getReg())) {
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unsigned Reg = MO.getReg();
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DLR = li_->getInterval(Reg).getLiveRangeContaining(DefIdx);
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if (DLR && DLR->valno->copy == CopyMI)
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DLR->valno->copy = NULL;
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if (DLR && DLR->valno->getCopy() == CopyMI)
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DLR->valno->setCopy(0);
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}
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}
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@ -791,7 +791,7 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
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unsigned DefIdx = li_->getDefIndex(li_->getInstructionIndex(UseMI));
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if (const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx)) {
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if (DLR->valno->def == DefIdx)
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DLR->valno->copy = UseMI;
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DLR->valno->setCopy(UseMI);
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}
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}
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}
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@ -1653,7 +1653,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
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for (LiveInterval::const_vni_iterator I = SavedLI->vni_begin(),
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E = SavedLI->vni_end(); I != E; ++I) {
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const VNInfo *ValNo = *I;
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VNInfo *NewValNo = RealInt.getNextValue(ValNo->def, ValNo->copy,
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VNInfo *NewValNo = RealInt.getNextValue(ValNo->def, ValNo->getCopy(),
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false, // updated at *
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li_->getVNInfoAllocator());
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NewValNo->setFlags(ValNo->getFlags()); // * updated here.
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@ -1833,7 +1833,7 @@ bool SimpleRegisterCoalescing::RangeIsDefinedByCopyFromReg(LiveInterval &li,
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DstReg == li.reg && SrcReg == Reg) {
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// Cache computed info.
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LR->valno->def = LR->start;
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LR->valno->copy = DefMI;
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LR->valno->setCopy(DefMI);
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return true;
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}
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}
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@ -1986,7 +1986,7 @@ bool SimpleRegisterCoalescing::SimpleJoin(LiveInterval &LHS, LiveInterval &RHS){
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// value number is defined where the RHS value number was.
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const VNInfo *VNI = RHS.getValNumInfo(0);
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LHSValNo->def = VNI->def;
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LHSValNo->copy = VNI->copy;
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LHSValNo->setCopy(VNI->getCopy());
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// Okay, the final step is to loop over the RHS live intervals, adding them to
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// the LHS.
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for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
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i != e; ++i) {
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VNInfo *VNI = *i;
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if (VNI->isUnused() || VNI->copy == 0) // Src not defined by a copy?
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if (VNI->isUnused() || VNI->getCopy() == 0) // Src not defined by a copy?
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continue;
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// DstReg is known to be a register in the LHS interval. If the src is
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for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
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i != e; ++i) {
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VNInfo *VNI = *i;
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if (VNI->isUnused() || VNI->copy == 0) // Src not defined by a copy?
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if (VNI->isUnused() || VNI->getCopy() == 0) // Src not defined by a copy?
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continue;
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// DstReg is known to be a register in the RHS interval. If the src is
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@ -790,7 +790,7 @@ void StrongPHIElimination::ScheduleCopies(MachineBasicBlock* MBB,
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true);
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LiveRange R = LI.addLiveRangeToEndOfBlock(I->first, I->second);
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R.valno->copy = I->second;
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R.valno->setCopy(I->second);
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R.valno->def =
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LiveIntervals::getDefIndex(LI.getInstructionIndex(I->second));
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}
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LiveRange R = LI.addLiveRangeToEndOfBlock(I->first,
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--SI->second->getFirstTerminator());
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R.valno->copy = --SI->second->getFirstTerminator();
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R.valno->setCopy(--SI->second->getFirstTerminator());
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R.valno->def = LiveIntervals::getDefIndex(instrIdx);
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DOUT << "Renaming failed: " << SI->first << " -> "
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