forked from OSchip/llvm-project
Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
llvm-svn: 148383
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@ -249,8 +249,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
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return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
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}
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case TargetLowering::TypeWidenVector:
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if (NOutVT.bitsEq(NInVT))
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// The input is widened to the same size. Convert to the widened value.
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// The input is widened to the same size. Convert to the widened value.
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// Make sure that the outgoing value is not a vector, because this would
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// make us bitcast between two vectors which are legalized in different ways.
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if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector())
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return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
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}
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@ -0,0 +1,14 @@
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; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
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;CHECK: vcast
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define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) {
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;CHECK: pshufd
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;CHECK: pshufd
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%af = bitcast <2 x float> %a to <2 x i32>
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%bf = bitcast <2 x float> %b to <2 x i32>
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%x = sub <2 x i32> %af, %bf
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;CHECK: psubq
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ret <2 x i32> %x
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;CHECK: ret
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}
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