forked from OSchip/llvm-project
Check full codegen in CodeGen/X86/i256-add.ll NFC
llvm-svn: 294756
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df124a7569
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@ -1,8 +1,71 @@
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; RUN: llc < %s -march=x86 > %t
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; RUN: grep adcl %t | count 7
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; RUN: grep sbbl %t | count 7
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define void @add(i256* %p, i256* %q) nounwind {
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; X32-LABEL: add:
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; X32: # BB#0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: subl $16, %esp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl 8(%ecx), %edi
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; X32-NEXT: movl (%ecx), %esi
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; X32-NEXT: movl 4(%ecx), %ebx
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; X32-NEXT: movl 28(%eax), %edx
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; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 24(%eax), %edx
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; X32-NEXT: addl (%eax), %esi
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; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: adcl 4(%eax), %ebx
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; X32-NEXT: movl %ebx, (%esp) # 4-byte Spill
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; X32-NEXT: adcl 8(%eax), %edi
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; X32-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: movl 20(%eax), %ebx
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; X32-NEXT: movl 12(%eax), %esi
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; X32-NEXT: movl 16(%eax), %edi
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; X32-NEXT: adcl 12(%ecx), %esi
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; X32-NEXT: adcl 16(%ecx), %edi
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; X32-NEXT: adcl 20(%ecx), %ebx
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; X32-NEXT: adcl 24(%ecx), %edx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
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; X32-NEXT: adcl 28(%ecx), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp # 4-byte Reload
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; X32-NEXT: movl %ebp, 8(%ecx)
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; X32-NEXT: movl (%esp), %ebp # 4-byte Reload
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; X32-NEXT: movl %ebp, 4(%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp # 4-byte Reload
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; X32-NEXT: movl %ebp, (%ecx)
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; X32-NEXT: movl %esi, 12(%ecx)
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; X32-NEXT: movl %edi, 16(%ecx)
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; X32-NEXT: movl %ebx, 20(%ecx)
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; X32-NEXT: movl %edx, 24(%ecx)
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; X32-NEXT: movl %eax, 28(%ecx)
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; X32-NEXT: addl $16, %esp
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: add:
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; X64: # BB#0:
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; X64-NEXT: movq 16(%rdi), %rax
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; X64-NEXT: movq (%rdi), %r8
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; X64-NEXT: movq 8(%rdi), %rdx
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; X64-NEXT: movq 24(%rsi), %rcx
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; X64-NEXT: addq (%rsi), %r8
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; X64-NEXT: adcq 8(%rsi), %rdx
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; X64-NEXT: adcq 16(%rsi), %rax
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; X64-NEXT: adcq 24(%rdi), %rcx
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; X64-NEXT: movq %rax, 16(%rdi)
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; X64-NEXT: movq %rdx, 8(%rdi)
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; X64-NEXT: movq %r8, (%rdi)
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; X64-NEXT: movq %rcx, 24(%rdi)
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; X64-NEXT: retq
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%a = load i256, i256* %p
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%b = load i256, i256* %q
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%c = add i256 %a, %b
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@ -10,6 +73,67 @@ define void @add(i256* %p, i256* %q) nounwind {
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ret void
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}
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define void @sub(i256* %p, i256* %q) nounwind {
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; X32-LABEL: sub:
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; X32: # BB#0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: subl $12, %esp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl 16(%ecx), %eax
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; X32-NEXT: movl 12(%ecx), %edx
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; X32-NEXT: movl 8(%ecx), %edi
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; X32-NEXT: movl (%ecx), %esi
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; X32-NEXT: movl 4(%ecx), %ebp
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; X32-NEXT: subl (%ebx), %esi
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; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: sbbl 4(%ebx), %ebp
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; X32-NEXT: sbbl 8(%ebx), %edi
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; X32-NEXT: sbbl 12(%ebx), %edx
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; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
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; X32-NEXT: sbbl 16(%ebx), %eax
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; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
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; X32-NEXT: movl 20(%ecx), %esi
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; X32-NEXT: sbbl 20(%ebx), %esi
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; X32-NEXT: movl 24(%ecx), %edx
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; X32-NEXT: sbbl 24(%ebx), %edx
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; X32-NEXT: movl 28(%ecx), %eax
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; X32-NEXT: sbbl 28(%ebx), %eax
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; X32-NEXT: movl %edi, 8(%ecx)
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; X32-NEXT: movl %ebp, 4(%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
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; X32-NEXT: movl %edi, (%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edi # 4-byte Reload
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; X32-NEXT: movl %edi, 12(%ecx)
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; X32-NEXT: movl (%esp), %edi # 4-byte Reload
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; X32-NEXT: movl %edi, 16(%ecx)
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; X32-NEXT: movl %esi, 20(%ecx)
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; X32-NEXT: movl %edx, 24(%ecx)
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; X32-NEXT: movl %eax, 28(%ecx)
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; X32-NEXT: addl $12, %esp
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: sub:
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; X64: # BB#0:
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; X64-NEXT: movq 24(%rdi), %r8
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; X64-NEXT: movq 16(%rdi), %rcx
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; X64-NEXT: movq (%rdi), %rdx
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; X64-NEXT: movq 8(%rdi), %rax
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; X64-NEXT: subq (%rsi), %rdx
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; X64-NEXT: sbbq 8(%rsi), %rax
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; X64-NEXT: sbbq 16(%rsi), %rcx
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; X64-NEXT: sbbq 24(%rsi), %r8
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; X64-NEXT: movq %rcx, 16(%rdi)
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; X64-NEXT: movq %rax, 8(%rdi)
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; X64-NEXT: movq %rdx, (%rdi)
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; X64-NEXT: movq %r8, 24(%rdi)
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; X64-NEXT: retq
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%a = load i256, i256* %p
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%b = load i256, i256* %q
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%c = sub i256 %a, %b
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