forked from OSchip/llvm-project
[ELF][MIPS] Factor out the code reading and calculating AHL addend into the separate function. NFC
llvm-svn: 262706
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@ -1646,6 +1646,12 @@ static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
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write32<E>(Loc, (Instr & 0xffff0000) | mipsHigh(V));
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}
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template <endianness E>
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static int64_t readMipsAHL(uint8_t *HiLoc, uint8_t *LoLoc) {
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return ((read32<E>(HiLoc) & 0xffff) << 16) +
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SignExtend64<16>(read32<E>(LoLoc) & 0xffff);
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}
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template <class ELFT>
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void MipsTargetInfo<ELFT>::writePltZero(uint8_t *Buf) const {
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const endianness E = ELFT::TargetEndianness;
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@ -1734,18 +1740,14 @@ void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
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case R_MIPS_GPREL32:
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write32<E>(Loc, S + int32_t(read32<E>(Loc)) - getMipsGpAddr<ELFT>());
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break;
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case R_MIPS_HI16: {
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uint32_t Instr = read32<E>(Loc);
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if (PairedLoc) {
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uint64_t AHL = ((Instr & 0xffff) << 16) +
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SignExtend64<16>(read32<E>(PairedLoc) & 0xffff);
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writeMipsHi16<E>(Loc, S + AHL);
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} else {
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case R_MIPS_HI16:
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if (PairedLoc)
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writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc));
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else {
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warning("Can't find matching R_MIPS_LO16 relocation for R_MIPS_HI16");
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writeMipsHi16<E>(Loc, S);
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}
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break;
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}
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case R_MIPS_JALR:
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// Ignore this optimization relocation for now
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break;
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@ -1770,17 +1772,14 @@ void MipsTargetInfo<ELFT>::relocateOne(uint8_t *Loc, uint8_t *BufEnd,
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case R_MIPS_PC32:
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applyMipsPcReloc<E, 32, 0>(Loc, Type, P, S);
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break;
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case R_MIPS_PCHI16: {
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if (PairedLoc) {
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uint64_t AHL = ((read32<E>(Loc) & 0xffff) << 16) +
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SignExtend64<16>(read32<E>(PairedLoc) & 0xffff);
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writeMipsHi16<E>(Loc, S + AHL - P);
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} else {
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case R_MIPS_PCHI16:
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if (PairedLoc)
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writeMipsHi16<E>(Loc, S + readMipsAHL<E>(Loc, PairedLoc) - P);
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else {
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warning("Can't find matching R_MIPS_PCLO16 relocation for R_MIPS_PCHI16");
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writeMipsHi16<E>(Loc, S - P);
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}
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break;
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}
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case R_MIPS_PCLO16: {
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uint32_t Instr = read32<E>(Loc);
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int64_t AHL = SignExtend64<16>(Instr & 0xffff);
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