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[mips] Reformat MSA instruction definitions. NFC 

llvm-svn: 364525
This commit is contained in:
Simon Atanasyan 2019-06-27 12:08:03 +00:00
parent 3ca8f2b007
commit 3b184cf7e1
1 changed files with 29 additions and 43 deletions
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72
llvm/lib/Target/Mips/MipsMSAInstrInfo.td
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@ -3764,52 +3764,38 @@ def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
// Pseudoes used to implement transparent fp16 support.
let ASEPredicate = [HasMSA] in {
def ST_F16 : MipsPseudo<(outs), (ins MSA128F16:$ws, mem_simm10:$addr),
[(store (f16 MSA128F16:$ws), (addrimm10:$addr))]> {
let usesCustomInserter = 1;
}
let usesCustomInserter = 1 in {
def ST_F16 :
MipsPseudo<(outs), (ins MSA128F16:$ws, mem_simm10:$addr),
[(store (f16 MSA128F16:$ws), (addrimm10:$addr))]>;
def LD_F16 :
MipsPseudo<(outs MSA128F16:$ws), (ins mem_simm10:$addr),
[(set MSA128F16:$ws, (f16 (load addrimm10:$addr)))]>;
}
def LD_F16 : MipsPseudo<(outs MSA128F16:$ws), (ins mem_simm10:$addr),
[(set MSA128F16:$ws, (f16 (load addrimm10:$addr)))]> {
let usesCustomInserter = 1;
}
let usesCustomInserter = 1 in {
def MSA_FP_EXTEND_W_PSEUDO :
MipsPseudo<(outs FGR32Opnd:$fd), (ins MSA128F16:$ws),
[(set FGR32Opnd:$fd, (f32 (fpextend MSA128F16:$ws)))]>;
def MSA_FP_ROUND_W_PSEUDO :
MipsPseudo<(outs MSA128F16:$wd), (ins FGR32Opnd:$fs),
[(set MSA128F16:$wd, (f16 (fpround FGR32Opnd:$fs)))]>;
def MSA_FP_EXTEND_D_PSEUDO :
MipsPseudo<(outs FGR64Opnd:$fd), (ins MSA128F16:$ws),
[(set FGR64Opnd:$fd, (f64 (fpextend MSA128F16:$ws)))]>;
def MSA_FP_ROUND_D_PSEUDO :
MipsPseudo<(outs MSA128F16:$wd), (ins FGR64Opnd:$fs),
[(set MSA128F16:$wd, (f16 (fpround FGR64Opnd:$fs)))]>;
}
def MSA_FP_EXTEND_W_PSEUDO : MipsPseudo<(outs FGR32Opnd:$fd),
(ins MSA128F16:$ws),
[(set FGR32Opnd:$fd,
(f32 (fpextend MSA128F16:$ws)))]> {
let usesCustomInserter = 1;
}
def : MipsPat<(MipsTruncIntFP MSA128F16:$ws),
(TRUNC_W_D64 (MSA_FP_EXTEND_D_PSEUDO MSA128F16:$ws))>,
ISA_MIPS1, ASE_MSA;
def MSA_FP_ROUND_W_PSEUDO : MipsPseudo<(outs MSA128F16:$wd),
(ins FGR32Opnd:$fs),
[(set MSA128F16:$wd,
(f16 (fpround FGR32Opnd:$fs)))]> {
let usesCustomInserter = 1;
}
def MSA_FP_EXTEND_D_PSEUDO : MipsPseudo<(outs FGR64Opnd:$fd),
(ins MSA128F16:$ws),
[(set FGR64Opnd:$fd,
(f64 (fpextend MSA128F16:$ws)))]> {
let usesCustomInserter = 1;
}
def MSA_FP_ROUND_D_PSEUDO : MipsPseudo<(outs MSA128F16:$wd),
(ins FGR64Opnd:$fs),
[(set MSA128F16:$wd,
(f16 (fpround FGR64Opnd:$fs)))]> {
let usesCustomInserter = 1;
}
def : MipsPat<(MipsTruncIntFP MSA128F16:$ws),
(TRUNC_W_D64 (MSA_FP_EXTEND_D_PSEUDO MSA128F16:$ws))>, ISA_MIPS1,
ASE_MSA;
def : MipsPat<(MipsFPCmp MSA128F16:$ws, MSA128F16:$wt, imm:$cond),
(FCMP_S32 (MSA_FP_EXTEND_W_PSEUDO MSA128F16:$ws),
(MSA_FP_EXTEND_W_PSEUDO MSA128F16:$wt), imm:$cond)>,
ISA_MIPS1_NOT_32R6_64R6, ASE_MSA;
def : MipsPat<(MipsFPCmp MSA128F16:$ws, MSA128F16:$wt, imm:$cond),
(FCMP_S32 (MSA_FP_EXTEND_W_PSEUDO MSA128F16:$ws),
(MSA_FP_EXTEND_W_PSEUDO MSA128F16:$wt), imm:$cond)>,
ISA_MIPS1_NOT_32R6_64R6, ASE_MSA;
}
def vsplati64_imm_eq_63 : PatLeaf<(bitconvert (v4i32 (build_vector))), [{