forked from OSchip/llvm-project
[DSE,MSSA] Fix crash when using tryToMergePartialOverlappingStores.
We are re-using tryToMergePartialOverlappingStores, which requires earlier to domiante Later. In the long run, tryToMergeParialOverlappingStores should be re-written using MemorySSA. Fixes PR46513.
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@ -2249,6 +2249,10 @@ bool eliminateDeadStoresMemorySSA(Function &F, AliasAnalysis &AA,
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if (EnablePartialStoreMerging && OR == OW_PartialEarlierWithFullLater) {
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if (EnablePartialStoreMerging && OR == OW_PartialEarlierWithFullLater) {
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auto *Earlier = dyn_cast<StoreInst>(NI);
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auto *Earlier = dyn_cast<StoreInst>(NI);
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auto *Later = dyn_cast<StoreInst>(SI);
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auto *Later = dyn_cast<StoreInst>(SI);
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// We are re-using tryToMergePartialOverlappingStores, which requires
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// Earlier to domiante Later.
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// TODO: implement tryToMergeParialOverlappingStores using MemorySSA.
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if (Earlier && Later && DT.dominates(Earlier, Later)) {
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if (Constant *Merged = tryToMergePartialOverlappingStores(
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if (Constant *Merged = tryToMergePartialOverlappingStores(
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Earlier, Later, InstWriteOffset, DepWriteOffset, DL, &AA,
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Earlier, Later, InstWriteOffset, DepWriteOffset, DL, &AA,
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&DT)) {
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&DT)) {
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@ -2267,6 +2271,7 @@ bool eliminateDeadStoresMemorySSA(Function &F, AliasAnalysis &AA,
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break;
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break;
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}
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}
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}
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}
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}
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if (OR == OW_Complete) {
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if (OR == OW_Complete) {
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LLVM_DEBUG(dbgs() << "DSE: Remove Dead Store:\n DEAD: " << *NI
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LLVM_DEBUG(dbgs() << "DSE: Remove Dead Store:\n DEAD: " << *NI
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@ -110,3 +110,33 @@ bb9: ; preds = %bb8, %bb7
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store double 6.0, double* %tmp3, align 8
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store double 6.0, double* %tmp3, align 8
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ret void
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ret void
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}
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}
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; Test case from PR46513. Make sure we do not crash.
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; TODO: we should be able to shorten store i32 844283136, i32* %cast.i32 to a
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; store of i16.
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define void @overlap_no_dominance([4 x i8]* %arg, i1 %c) {
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; CHECK-LABEL: @overlap_no_dominance(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB13:%.*]], label [[BB9:%.*]]
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; CHECK: bb9:
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; CHECK-NEXT: [[CAST_I32:%.*]] = bitcast [4 x i8]* [[ARG:%.*]] to i32*
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; CHECK-NEXT: store i32 844283136, i32* [[CAST_I32]], align 4
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; CHECK-NEXT: br label [[BB13]]
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; CHECK: bb13:
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; CHECK-NEXT: [[CAST_I16:%.*]] = bitcast [4 x i8]* [[ARG]] to i16*
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; CHECK-NEXT: store i16 0, i16* [[CAST_I16]], align 4
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; CHECK-NEXT: ret void
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;
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bb:
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br i1 %c, label %bb13, label %bb9
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bb9: ; preds = %bb
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%cast.i32 = bitcast [4 x i8]* %arg to i32*
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store i32 844283136, i32* %cast.i32, align 4
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br label %bb13
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bb13: ; preds = %bb9, %bb
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%cast.i16 = bitcast [4 x i8]* %arg to i16*
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store i16 0, i16* %cast.i16, align 4
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ret void
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}
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